Resistor values in Buffer circuit (math help)

Started by knutolai, April 11, 2013, 07:31:23 AM

Previous topic - Next topic

knutolai

So Im making a buffer circuit for a digital effect pedal. Strictly speaking this should go in that subforum however this thread is concerning only the strictly analog parts of the circuit.



There are two things about my circuit that Im a little unsure about:
1. On the input stage I have a diode network to limit the input signal according to the voltage supply of the circuit. There is also a 1k current limiting resistor. Does it matter if the diodes are placed before or after the 1M resistor? Can R1 be removed as the buffer architecture already is current limiting (R2)?
2. The main uncertainty: Im unsure what resistor values to use for the output buffer. I've been told the input impedance should be approx. 10 times the output impedance from the last buffer. However Im not quite sure how I would go about calculating the output impedance of the two buffers meeting at P2. Also I wish the output buffer to have a gain ranging from (-) 0,05 to 5.

Using this architecture:

P2 (in my schematic) would be used to find Rin (in the figure). Ive just assumed a Rin of 100k for my circuit. The min. gain would then be R10/100k = 0,05 and the max. gain would be 0,05 * ((P3 + R4)/R4) = 5. Have I understood this correctly? Alternatively would I need to add anything between P2 and pin 13 of the IC? Change any resistor values?

Im a little confused  :icon_confused:


merlinb

#1
Quote from: knutolai on April 11, 2013, 07:31:23 AM
1. On the input stage I have a diode network to limit the input signal according to the voltage supply of the circuit. There is also a 1k current limiting resistor. Does it matter if the diodes are placed before or after the 1M resistor? Can R1 be removed as the buffer architecture already is current limiting (R2)?

It is better to leave the diodes where they are. Placing them after the 1M resistor (at the virtual earth) would still provide protection, but it is bad practice to stick anything on a virtual earth that doesn't absolutely need to be there, as it is a very sensitive part of any circuit.

The 1k resistor is a good idea as it provides some isolation between the diodes and whatever might be trying to drive the diodes, during overload conditions.

I would also recommend that you rearrange the input opamp to be non-inverting, for reduced noise, unless you really need it to be inverting as shown.

Quote
2. The main uncertainty: Im unsure what resistor values to use for the output buffer. I've been told the input impedance should be approx. 10 times the output impedance from the last buffer. However Im not quite sure how I would go about calculating the output impedance of the two buffers meeting at P2.

The output impedance of the JFET and input buffer are negligible, so your 'output impedance' is really the equivalent source resistance of P2, which can range from near zero (wiper at either end) to 25k (wiper in the centre).

If you put in a 2k input resistor after the wiper, and use 10k feedback resistance, then the max gain will be near enough 5 (wiper at either end). But you may want to increase C4 and C7 a bit, if you want to cover the full bass range...
With the wiper in the centre it will be 10k/(2k+25k) = 0.37.
You could reduce this value by increasing the value of P2, but noise would suffer.

Also, I don't think you want to use the two resistors marked R4. Looks like you may have mixed a few different circuit ideas there- there is no need to connect P1 and P3 to Vr.

knutolai

#2
QuoteI would also recommend that you rearrange the input opamp to be non-inverting, for reduced noise, unless you really need it to be inverting as shown.

The reason Im using a inverting amp is that I dont know how to arrange a non-inverting opamp for gain less than 0 (signal dampening). Yes Im a bit of a noob.. Edit: Also I wish for the input and output signals to be in phase with each other.

QuoteAlso, I don't think you want to use the two resistors marked R4. Looks like you may have mixed a few different circuit ideas there- there is no need to connect P1 and P3 to Vr.

Would the formula I use for calculating max. gain still apply if I did this? Or is the formula correct at all?

QuoteWith the wiper in the centre it will be 10k/(2k+25k) = 0.37.
You could reduce this value by increasing the value of P2, but noise would suffer.

What if I reduced the value of P2 to 10k and put a larger resistance after the wiper? would this make Rin more stable? Also would this present me with more noise issues? Its might be obvious from the schematic, but P2 is supposed to let me blend between the signals from the input and DAC.

merlinb

#3
Quote from: knutolai on April 11, 2013, 08:22:56 AM
The reason Im using a inverting amp is that I dont know how to arrange a non-inverting opamp for gain less than 0 (signal dampening).
Ah, you can't. You would instead use a simple potential divider, followed by an opamp buffer.
Do you really need to attenuate the input signal? Guitar signals are pretty small...
Also, how come you're using a JFET for the DAC input, rather than an opamp buffer? Are you really pressed for space?

Oh, just spotted C14. Get rid of it. Opamps don't like driving shunt capacitors!

Quote
Also I wish for the input and output signals to be in phase with each other.
Fair enough.

Quote
What if I reduced the value of P2 to 10k and put a larger resistance after the wiper? would this make Rin more stable? Also would this present me with more noise issues?

Ah, sorry, I slightly misunderstood your requirements. You mean you want to be able to manually adjust the gain between 5 and 0.05 using P3?
In that case, it might be better to make P2 = 10k, followed by a 100k series resistor, as you said.
Then make R10 = 5k and make P3 = 500k.
Get rid of R10.
Also increase C4 and C7.
:)

EDIT: Maybe this would be easier:
Make P2 = 10k so its source impedance is plenty low enough.
Get rid of that output buffer completely and instead replace the JFET with an *inverting* opamp stage.
Reconfigure the guitar input opamp for non-inverting gain.
Provide both opamps with trimmers to adjust their gain.

This would give you individual control over the wet and dry path gains, and keeps the phasing correct, and eliminates some parts, and should improve noise.

knutolai

QuoteAh, you can't. You would instead use a simple potential divider, followed by an opamp buffer.
Could you elaborate on this? I don't fully understand. Would it be like a non-inverting opamp with a gain equal to the max. gain that I desire, with a volume/drive potentiometer in front of it? Could you maybe draw the concept? Im interested in this solution!  :icon_surprised:

Quote
QuoteThe reason Im using a inverting amp is that I dont know how to arrange a non-inverting opamp for gain less than 0 (signal dampening).
Do you really need to attenuate the input signal? Guitar signals are pretty small...
Sorry I meant to say 'gain less than 1'. I definitely will need to be able to dampen the input signal as the ADC expects a signal with max 3.3Vpp.

QuoteAlso, how come you're using a JFET for the DAC input, rather than an opamp buffer? Are you really pressed for space?
Could I change around the JFET buffer and the OpAmp producing the Vref?

QuoteEDIT: Maybe this would be easier:
Make P2 = 10k so its source impedance is plenty low enough.
Get rid of that output buffer completely and instead replace the JFET with an *inverting* opamp stage.
Reconfigure the guitar input opamp for non-inverting gain.
Provide both opamps with trimmers to adjust their gain.

This would give you individual control over the wet and dry path gains, and keeps the phasing correct, and eliminates some parts, and should improve noise.

Removing the output opamp seems like a OK idea. However the DAC- and input-buffers needs to be in phase. hmm or maybe I could phase shift the signal digitaly (!!!!!  :icon_biggrin:)

Thank you very much for all this help! I really appreciate it!  :)

merlinb

#5
Quote from: knutolai on April 11, 2013, 10:40:01 AM
Could you elaborate on this? I don't fully understand.
Input cap, followed by a resistor divider (or trimpot) to attenuate the signal by the desired amount, then an opamp buffer (noninverting). Kinda like this, except you don't really need R4.


Quote
Sorry I meant to say 'gain less than 1'. I definitely will need to be able to dampen the input signal as the ADC expects a signal with max 3.3Vpp.
3.3Vpp is more than enough for passive pickups. Passives rarely exceed 1Vp-p even when you pluck the string hard.
You could always use your R8 to attenuate the  signal fed to the ADC. Much simpler.

Quote
Could I change around the JFET buffer and the OpAmp producing the Vref?
Yes you could do that. But why not just use another opamp?

Quote
However the DAC- and input-buffers needs to be in phase.
I thought of that with my suggestion! ;D It would be in phase! The signal comes in, then gets inverted by your anti-aliasing filter, then passes through the digital circuit, then gets re-inverted before it is fed into P2, so it is back in phase with the original input!

PRR

Lower-right opamp (filter) lacks any connection to Vr.

Throw 1Meg from Vr to +In.

Better(?): discard C5, let filter bias from low-left opamp.

As I see it, top-right opamp's gain goes to "infinity" when P2 is at an extreme. On the FET side, limited by J201 source impedance (pencil 1K). On the other, opamp out is near-enuff zero, so "infinite" gain. Bass-cut by 1uFd.

> gets inverted by your anti-aliasing filter

Think that his filter is non-inverting?

There are inverting forms, but the math is less obvious.

However that should not matter, unless the ADC/DAC pair inverts (and who ever knows?).

Agree that the input outta be non-inverting unless the signal is STRONG.
  • SUPPORTER

knutolai

QuoteInput cap, followed by a resistor divider (or trimpot) to attenuate the signal by the desired amount, then an opamp buffer (noninverting). Kinda like this, except you don't really need R4.
I would still connect the input of the buffer to Vr via a resistor like in the figure below right? Kinda like in parallel with the voltage regulator?

Also wouldn't the resistor divider hurt the impedance of the buffer when connected directly to its input?
Could this be avoided by adding a capacitor between the resistor divider and the buffer input?

Quote3.3Vpp is more than enough for passive pickups. Passives rarely exceed 1Vp-p even when you pluck the string hard.
You could always use your R8 to attenuate the  signal fed to the ADC. Much simpler.
Im rather fond of noise music and analog feedback circuits. I want the circuit to be able to be used for both. I want it to tackle both guitar and hotter signals (like 8Vpp and below). I probably should have stated this in the initial post.

QuoteI thought of that with my suggestion!  It would be in phase! The signal comes in, then gets inverted by your anti-aliasing filter, then passes through the digital circuit, then gets re-inverted before it is fed into P2, so it is back in phase with the original input!
You are absolutely right! haha oh man I feel so stupid  :icon_lol: There's just way to much stuff in my head at the moment i guess.

QuoteYes you could do that. But why not just use another opamp?
I dont have any smaller opamps than the tl074 laying around and Im kinda pressed on time (cant wait for another shipping). Using a JFET seems more logic to me. Does it yield a much worse result than using a opamp? If you think Im able to just skip the output buffer I have a spare opamp and can skip the JFET altogether.

QuoteBetter(?): discard C5, let filter bias from low-left opamp.
great idea!

QuoteAs I see it, top-right opamp's gain goes to "infinity" when P2 is at an extreme. On the FET side, limited by J201 source impedance (pencil 1K). On the other, opamp out is near-enuff zero, so "infinite" gain. Bass-cut by 1uFd.
Ill update the schematic ASAP. The idea was to put a resistor between P2 and the input of the output buffer.

merlinb

#8
Quote from: knutolai on April 11, 2013, 04:48:41 PM
I would still connect the input of the buffer to Vr via a resistor like in the figure below right?
The bottom of the resistor divider would connect to Vr; no need for an extra resistor.

Quote
Also wouldn't the resistor divider hurt the impedance of the buffer when connected directly to its input?
You would use large resistors in the divider (or 1M trimpot) to get the high input impedance you desire. No need to attenuate at the input in this case, since you can use R8.

QuoteThink that his filter is non-inverting?
Oops, wasn't looking carefully enough!
In that case the JFET could be replaced with a non-inverting opamp buffer. In other words, the whole job could be done with four opamps, all non-inverting, and no JFET.

Here's my attempt. Only drawback is it can't handle full 8Vpp input signals, but maybe it would be easier simply to run it off a 12V supply then?


knutolai

#9
Not sure what is standard practice on this forum so I'll post a new schematic so that we can keep the old one as a reference:

The input now has a static gain of approx 8. This can be attenuated by P1. This would allow for dampening and amplification of the signal.
The output buffer has a static gain of approx 5 which can be attenuated by the normal volume control at the output.

-The cap. in front of the 2. order LP-filter has been removed (great idea PRR!)
-All buffers are now non-inverting
-The AREF has been changed around to a normal voltage regulator resistor circuit (AREF was supposed to be a pin on the MCU which appeared not to be available after all. I wont use this part of the circuit to control the gain.

edit: didn't see your circuit before I added my own modifications. Ive decided I need the output opamp in order to make up for potential volume loss from the input buffer. The main point of the input and output gain control is to scale/prepare the signal for the ADC and to make up for any volume change made to the signal. Ill add the capacitor to ground in front of the Vref current amp.

Would this circuit configuration present me with any problematic noise issues?

merlinb

#10
Quote from: knutolai on April 11, 2013, 05:44:56 PM
Would this circuit configuration present me with any problematic noise issues?
It's better than what you started with. You don't need such huge resistors in the input and output opamp feedback loops though; you can reduce those resistors by at least a factor of ten. Same for P2.

I still think it would be better to attenuate the signal using R8 (OK a little tweaking now you've added R9) rather than at the input. Then reamplify the signal after it comes from the DAC, but that's just me.

If you really want to handle 8Vpp signals then you going to need more supply voltage, even with your configuration!

P1 should be connected to Vr, not to ground.

You can get rid of your JFET. The Vref doesn't need to be buffered since there's negligible current flowing into it.  Just put a 10u cap on it or something.

If you want to be really minimalist, you can get rid of C7 and R16. The output buffer can get its reference from the DAC buffer.

Oh, it's good practice to put a 100 ohms resistor in series with the circuit output (after P3) to isolate the opamp from cable capacitance.

knutolai

QuoteIt's better than what you started with. You don't need such huge resistors in the input and output opamp feedback loops though; you can reduce those resistors by at least a factor of ten. Same for P2.
Got it! Does that apply to R3 and R14 too? I need the correct ratio to get the gain I want.

QuoteIf you really want to handle 8Vpp signals then you going to need more supply voltage, even with your configuration!
This would be a extreme case scenario I guess. Im not proficient with electronics. My pedal-setup consists of 9volt supplied pedals. I make feedback-loops for noise using a matrix mixer. I just assumed that the max peak-to-peak voltage such a setup would be able to produce was approx. 8Vpp.

QuoteIf you want to be really minimalist, you can get rid of C7 and R16. The output buffer can get its reference from the DAC buffer.
Wouldnt that hurt the purpose of the blend pot (P2)?

Ill have a new schematic up later today. Thanks a lot for all this help! I learn more on this forum than I did when I took a electronics course!

merlinb

Quote from: knutolai on April 12, 2013, 06:52:25 AM
Got it! Does that apply to R3 and R14 too? I need the correct ratio to get the gain I want.
R3,4, 14 and 15 can all be reduced by the same factor. That will keep the gain the same.

Quote
I just assumed that the max peak-to-peak voltage such a setup would be able to produce was approx. 8Vpp.

More like 7Vp-p with ordinary opamps. If you're lucky. Lots of popular pedals barely have 1Vp-p headroom, and nobody seems to complain. Headroom is something people worry about too much on this forum... ;)

Quote
Wouldnt that hurt the purpose of the blend pot (P2)?
Nope, the DC will be the same wherever the pot is set; only the AC changes.

knutolai

#13
I don't know what's standard practice when it comes to updating schematics in threads on this forum. Ill upload the new one i this post. I can delete it and edit the old one if that's less confusing.

So here it is:


Anything more to add to this? (I realize the part naming is a little patchy and inconsistent, still I think it looks kinda beautiful!) I changed the values of R14 and 15 little for a different gain. If there aren't any more big issues with this design Ill try breadboarding it.

PRR

Myself, I'd take the gain-set resistors even lower. The '072 can drive 2K without stink, 5K without hardly noticing. You have other loads but nothing heavy. So say R4=10K R3=1k5. Even 4k7 and 720.

This may not matter. In many settings, P1 dominates overall noise and RF suction. But it has seemed to me to be good practice, when nothing objects, to keep NFB networks medium-low impedance.

Personally, R1 could be 10K or 33K. But the diodes can do way over 10mA and you are unlikely to have 10V over-voltage. Still, 10K is safe for 100V accidents, it can take 33K (and some stray C) to kill the voices if you have to work near a strong radio transmitter, and none of these begin to impinge on the 1Meg P1.
  • SUPPORTER

knutolai

Nice Ill add that to the schematic! Could C6 be polarized or is that impossible? I really don't want to blow up a electrolytic capasitor  :P

merlinb

Quote from: knutolai on April 16, 2013, 09:59:28 AM
Nice Ill add that to the schematic! Could C6 be polarized or is that impossible? I really don't want to blow up a electrolytic capasitor  :P
Yes, C6 can be polarised. The output of the opamp idles at 4.5V, whereas the other side of the cap is at only 1.65V. (Modern electrolytics work fine with no polarising voltage, so you're definitely OK in this case).

knutolai

QuoteThe output of the opamp idles at 4.5V, whereas the other side of the cap is at only 1.65V
That makes a lot of sense!  Thanks!

Thought I would add the updated schematic: 


-Removed the volume control and made U1B have a static gain of 2.5. I don't know... Two volume controllers seemed a little excess.
-Removed the unnecessary components as suggested.
-Lowered the values of the resistors in U1C.
-Added zener diode on the ADC input just in case..

knutolai

#18
Ok so I breadboarded the circuit and there are a couple of issues.

First of. When the input gain pot P1 is set 550k/450k (550k between R1 and +input, 450k between +input and Vr) I get massive interference. Like a lot of white noise in the signal. Also if I hover my hand above the circuit or make a call with my phone the circuit picks it up (only at and around this point in the potmeter sweep). I already added a stray cap. as PRR suggested. Anything else I could try out? I'm kinda clueless when it comes to this topic.
Edit: Tried with greater stray cap (C11, 1nF). Problem still there. The stray cap does not really do any difference
Edit2: Lowered P1 to 50k (first tried 100k). Its a lot better, but still more noise than what I find tolerable. Also added a pull down resistor of 1M at the input before C1 at the input. I think it kinda helped with some of the most nasty hum.  
Edit3: As suggested here (http://www.muzique.com/lab/hum.htm) I should probably solder the board before jumping to any conclusions on the noise issues.

For my test circuit I used a (digitech) reverb pedal between ADC and DAC (omitting R8, R9 and D3). When P2 is set so that there is minimal resistance between U1A and U1B the reverb goes into feedback. I figured this could probably be fixed by increasing the value of P2. Anythig else I could try?
Edit: I tried with a 100k pot for P2 and the issue is still there, though not as extreme. I really dont understand why I get feedback. The signal from DAC would have to travel through P2, by the output of U1C, which is really low impedance (right?). Shouldn't that kind of leakage be minimal to such a degree that its unnoticable?

PRR

> input gain pot P1 is set 550k/450k (550k between R1 and +input, 450k between +input and Vr) I get massive interference.

It probably wants to be in a closed metal box.

Try 50pFd from P1 wiper to ground. Go 200pFd on breadboard, understanding that this will sound dull, you'll lighten-up this cap loading when you go in a box.

500pFd across R4 is not a bad idea.

Try keeping stuff around P1 *far* from anything after that.

Dual opamps are often "better" than quad-packs simply because you aren't forced to so much stuff so close together that it oscillates supersonically (which upsets the audio action, often "hiss").

However your other feedback issue suggests you may not be wired like you think you are.
  • SUPPORTER