Decoupling caps and noise

[SpaceCowboy]

Hi all, so I've finally had the time to slap together that FV-1 based effect circuit I've been obsessed about all exam season... anyway, after almost burning the chip (twice!) with over voltage and finding out one of my patch chords was fubar, I've finally got a working circuit.

Now after experimenting a bit I found that there was a very subtle noise in the signal when strumming the guitar yet hardly any noise when there was no input. I've checked the grounding on the input and still the noise was there. So I isolated the noise to the Tl072 active filter stage and thought the op amp was causing it. Then I  put a 104 decoupling cap from Vcc to ground on the op amp and the noise was much less noticeable... though you could still hear it very slightly.

So anyone one else have experience with decoupling caps and TL072's to get rid of the noise? I wonder if buying a more expensive audio op amp like the NE5532 or the OPA2134 would have a noticeable difference on the noise level.
Oh and one more thing, I've noticed that turning the volume pot on my guitar makes these crackling sounds at the circuit output, once again I've isolated  this to the amplifier stage. Anyway ideas? Thanks!

Edit: fixed the crackling issue... DC voltage was leaking into the guitar lol.

[Kipper4]

I would appreciate a diagram of the changes made to the schematic you used with notes please. Just because I'm learning and decoupling is a significant issue thanks Rich

[samhay]

A 100n (ish) ceramic cap from V+ to ground is a good idea on any op-amp, and the closer you can get it to the V+ pin (8 on the LF072) the better.
I think we are going to need to see the schematic, but do you have a large cap from you Vbias (4.5V) to ground?

[SpaceCowboy]

Well here's the schematic for the active filter stage... just a basic inverting active low pass.



Yeah there's a 10uF electrolytic cap from VBias to GND... um the Regulator is a LM7l033 with a 10uF cap from 3.3V output to GND
other wise the FV-1 circuit is per the application note on the datasheet.

I'm pretty sure that subtle bit of fuzz is from the op amp itself. Guess it's time to get some fancy expensive ones lol.

Edit: Oh yeah C1 and C4 are tant caps... C2 and C5 are ploy film caps and the decoupling is a 104 ceramic.

[amptramp]

I am not sure you can get good noise performance running the TL072 on 3.3 volts.  You may find you have noise from the input stage that cancels when there is no signal but appears when the current through the input FET's becomes unbalanced as signal is applied.  My data shows ±3.3 volts to be the lowest supply voltage for which data is given.  You have to have enough voltage to turn on the current source for the input FET's and to operate the current mirror loads.  +3.3V / -0V is half that and not within rated parameters.  It might work, but don't expect to see your 18 nV/root Hz noise or any reasonable slew rate.  You need to run the TL072 at a higher voltage then clamp the output so it doesn't fry the digital chip.

[SpaceCowboy]

I am not sure you can get good noise performance running the TL072 on 3.3 volts.  You may find you have noise from the input stage that cancels when there is no signal but appears when the current through the input FET's becomes unbalanced as signal is applied.  My data shows ±3.3 volts to be the lowest supply voltage for which data is given.  You have to have enough voltage to turn on the current source for the input FET's and to operate the current mirror loads.  +3.3V / -0V is half that and not within rated parameters.  It might work, but don't expect to see your 18 nV/root Hz noise or any reasonable slew rate.  You need to run the TL072 at a higher voltage then clamp the output so it doesn't fry the digital chip.

+1 Dude.
As for the voltage clamping, since I'm running the op amp at about unity gain, shouldn't it be fine to just crank up the Vcc and VBias to battery and 1/2 battery and let the tant cap filter out the DC offset voltage? I doubt the peak to peak voltage of the signal will be very large. Then again, I don't have access to a 'scope here so yeah lol.

[octfrank]

Do what amptramp said, increase the voltage to the 072 and clamp the output to 3.0Vp-p.

I see in the schematic you are only driving pin 1 of the FV-1, drive both inputs with the same signal when running mono in because some algorithms add the two inputs together internally so best to always drive both inputs even for a mono effect.

[SpaceCowboy]

Ok, so if I were to clamp the output with a diode clamp like so,



with Vmax being the battery voltage and Vmin being ground,
after the output of the op-amp but before the tant cap,
and making sure that the output is +/- 1.5v from the Vbias (4.5V for a fresh 9V)...
I'd need diodes with some large fwd voltage drops no?



Like LEDs or something, correct?

[octfrank]

You could use 2 silicon diodes in place of D1 and D2, each silicon is about 0.7V so you would have about 2.8Vp-p into the FV-1 at clamp.