Every once in a while reference to my old (maybe 2006 era?) posts about a modification to the EA tremolo surface.  My first revision was based upon FNJ598J FETs which are no longer in production, and honestly not the best for use as a variable resistance element due to a built-in protection diode between gate and source.

I have greatly refined this design, simulated the heck out of it and then breadboarded it the other night to make sure it's everything I think it is.

What is it?  It's a revisitation of the EA tremolo with the main improvement being the ability to modulate to infinite depth.  The resultant waveform in simulation at max depth is a pleasantly rounded square wave so it does this trick a lot better than some might have predicted.

This document explains it quite a bit better:
http://cackleberrypines.net/transmogrifox/rEAgeneratedTremolo/rEAgenerated_Tremolo_Design_Rationale.pdf
And here is a link to the schematic.  The image is so large it would be inconsiderate to post it directly until I have had time to make a reduced size image:
http://cackleberrypines.net/transmogrifox/rEAgeneratedTremolo/rEAgenerated_schematic_img.PNG
Or PDF if you prefer:
http://cackleberrypines.net/transmogrifox/rEAgeneratedTremolo/rEAgenerated_schematic_pdf.pdf

Please let me know if there are mistakes.  Otherwise I think it's ready for the first daring soul who wants another take on this old tried-and-true friend.

As time goes on I will eventually post some simulation results comparing the 2 circuits and maybe make a web page for the rEAgenerated Trem.  If somebody builds this and loves it...and makes a through-hole layout, I am happy to post contributed layouts on my site.

Another thing to be added is the current KiCAD project.  I created an SMT layout, but the project files would make a quicker step-up to re-assigning footprints to create a TH layout if desired.

For now I'm happy if anybody can make use of what I have linked for now.

OK.. Now your "infinite depth" get me in trouble to build it with descrete items...

(another weekend on my cracked breadboard..) 

I do like cake.

that depth pot is brilliant.

I will pre-qualify my statements with the disclaimer that I don't know what I'm talking about, just trying to understand.

The depth pot confuses me. Doesn't D1 half-wave rectify the LFO signal, thereby changing the LFO wave shape? I'd imagine swapping the depth pot and D1 order could be a simple fix for that if necessary, but would that throw off Q3? And why no decoupling cap between the LFO and Q3 gate?

First thing I'll mention is that I have breadboarded this and it does work as expected.  Sounds very similar to the original EA on lighter settings, and is a good chopper on more extreme settings.

Quote from: GGBB on September 03, 2015, 06:08:57 PM
Doesn't D1 half-wave rectify the LFO signal, thereby changing the LFO wave shape?

D1 (which is the LED) has very little effect on the LFO shape.  I tried different placements of this in simulation and found this configuration to be the best for keeping the waveform suitably clean. 

The common emitter BJT amplifier as used in the oscillator is a current mode device.  The LFO ranges from 9V down to about 3V by increasing current draw through the 10k resistor and D1 -- at which point the oscillator turns around and goes back up by decreasing current.  The current never changes direction:  In this oscillator it's either positive or less positive ranging down to zero.  A BJT doesn't make current flow in the reverse direction (unless severely saturated) so the LED doesn't effect the expected current flow.

Quote
And why no decoupling cap between the LFO and Q3 gate?

The reason for moving Q3 drain to +9V was to do away with the need for AC coupling.

The LFO wave shape above the LED ranges from about 6V to 9V.   When it is at 9V, the FET Vgs=0, so the channel is wide open (low resistance).  As it decreases toward 6V, the gate becomes negatively biased vs the drain and source.  This causes the FET to pinch off, or increase in resistance.

The only reason I can think for ground-referencing the FET and AC coupling to the gate is perhaps due to power supply noise coupling into the amplifier. 

The rEA has solved the power supply noise concern by means of significant gain reduction from the original design combined with the series RC to decrease power supply noise.

I should have a layout for 1/8W resistors, 10x11 perf, mill bypass included, for perusal by tomorrow. it needs some massage at the mo.

4 pots and a switch, this has too many controls for a 1590LB build, going to have to look at 1590A. Breadboard time coming up- DA keeps me busy.

Quote from: Cozybuilder on September 04, 2015, 11:44:07 AM
4 pots and a switch...

1 pot is optional (P2,P3 connection) if you still want to shoot for the 1590LB...but for that matter all of the pots are optional so maybe I haven't made a relevant point 

"When JFET Q3 is completely pinched off, the impedance at this node is very high.  This translates to signal attenuation to a level that is inaudible (infinite depth)."

Can you explain this further? I'm trying to understand why this attenuates the signal below unity. It looks to me that C5 is still AC gain in parallel with the Q2 assembly.

Quote from: midwayfair on September 04, 2015, 01:10:59 PM
"When JFET Q3 is completely pinched off, the impedance at this node is very high.  This translates to signal attenuation to a level that is inaudible (infinite depth)."

Can you explain this further? I'm trying to understand why this attenuates the signal below unity. It looks to me that C5 is still AC gain in parallel with the Q2 assembly.

Q2 is acting as a constant current source, and the emitter degeneration multiplies the impedance looking into Q2 significantly such that it is more than 10x the impedance seen looking into the 2Meg parallel Q3.  I am also assuming a fully pinched-off Q3 is more than 10x impedance compared to R9,R10.

So you are correct, there is still and AC-coupled path going through C2, R9,R10 but as shown in the illustration this puts the equivalent gain at something like -50dB.  Unless you are going into a cranked amp or really high gain distortion, -50 dB is pretty much inaudible.

It will likely be audible going into a high gain distortion, but it will cut through enough that I predict a non-subtle chopper sound will result from using it to drive a cranked amp.

It's a good point you have brought up, because it shows that increasing the values of R9 and R10 will increase the depth even more if you intend to drive a high gain amp or distortion pedal with the tremolo on the front end.

Another thing I haven't computed, but expect is negligible is the parasitic capacitance across Q2 and Q3.  Since this is on the order of pF I assume the charge needed to drive R5 at a current to have an appreciable level is going to be in the ultrasonic to RF range.

Now as to your question about why it attenuates below unity, let me try to guess what is causing the confusion:
The signal level seen at the source of Q1 will be very close to unity.  However, because it is causing very small currents to flow in and out of C5 and is making extremely small changes in bias current in Q2, only ~-50dB worth of this gets translated to Q1 drain.  So there's a party at Q1 source, but Q1 drain barely feels a wiggle because the current in R5 is holding steady at the bias set by Q2.

Q2 is the reason this works.

One other caveat:   If you drive this with a high amplitude signal it will cause Q3 to turn itself on in splatty blats.  It's a handy thing the volume control is on the input.

[EDIT]
I went back to LTSpice to see if my assumption about impedance on the pinched-off FET is correct.  It is correct as long as R9 is removed.  It turns out the effect of R9,R10 linearising resistors significantly reduce the effective impedance looking into Q3 to 10's of kOhms, and output gain is on the order of -32 dB.

Remember, this has about 12 dB gain, so the difference between max level and min level is 12 dB - (-32 dB) = 44 dB, so it's anything but subtle at max depth.

If driving high gain pedals from the front end, maybe the first mod is to remove R9.
I hope that has helped to clarify.

For most uses my ears tell me the inclusion of R9 is an improvement while it sounds very abrupt at max depth.  The LTSpice FFT shows me distortion is a bit lower on the rEAgenerated Trem vs the EA stock trem.
[/EDIT]

That does clarify it, thanks! I have not played with transistors paired that way more than a little bit (just a couple microphone circuits that I don't know what I'm doing with). The explanation was very useful.

I do think I'd want an input buffer with that 1M pot at the input. Is there a compelling reason or need to leave Q1 as a FET if I do that (obviously with proper biasing resistors changed where needed)?

Thanks T-x - the explanations are very helpful.

A couple of questions:

What should the polarity of C5 be? My guess would be negative toward R8, but I can't be sure from merely looking at the schematic.

I'm fairly sure that the volume pot should be reversed, and I think the rate pot needs have pins 1&2 joined not 2&3. Can you confirm that the depth pot is drawn correctly, with pin 1 at +9V?

EDIT:
One more question - will the DC on the depth pot make noise in the audio path when depth is adjusted? I know this happens in some circuits, not sure if it will happen in this one.

If C5 is a polarized cap it should be + connected to R8 and - to Q1,Q2.

It is correct that the depth pot is connected to +9V on one side, but pin 1 vs pin 3 I don't know.

As for volume & rate pot pinouts -- I will as much as admit that I didn't check these with datasheets from a specific pot.  It's off-board wiring so it's easy to fix it if it's wrong.

My guess is the depth pot won't make audible crackle like most DC biased pots in the audio path.  The gain on this depends on the level of the signal through Q3 since this is effectively a multiplier.  A cap across the pot should fix that if there is audible crackle.

Quote from: Transmogrifox on September 05, 2015, 07:57:53 PM
If C5 is a polarized cap it should be + connected to R8 and - to Q1,Q2.

It is correct that the depth pot is connected to +9V on one side, but pin 1 vs pin 3 I don't know.

As for volume & rate pot pinouts -- I will as much as admit that I didn't check these with datasheets from a specific pot.  It's off-board wiring so it's easy to fix it if it's wrong.

My guess is the depth pot won't make audible crackle like most DC biased pots in the audio path.  The gain on this depends on the level of the signal through Q3 since this is effectively a multiplier.  A cap across the pot should fix that if there is audible crackle.

Can anyone who has this breadboarded verify those pot configurations? In particular the depth pot orientation - needs to work so that clockwise increases depth. I have completed a layout with on-board pot connections but will need to make a change if the depth pot is opposite from what's drawn in the schematic.

I feel so ashamed, 2 days late and a row over. it couldn't be done 10 x 11, and there is a link to boot. I feel dirty. and those empty holes .....



this layout is as yet unchecked, please advise if you see any bad layout/errors [R8 and C5 is a series circuit]. cap polarity is marked for if electros are used. the millenium is layed for a 2N7000. part numbers and transistors as per transmogs dia. pot connections are from the dia as well.

[edit :] v0.2 now showing, see below, and above. sorry about the now-excessive colour.

It looks good as far as I can see.  "D1" reference on the millenium causes a little confusion with my schematic which uses that designator for the LED.  If you change that to D2 or something that will refer to a part that doesn't cause confusion that way.  Maybe I can redraw a schematic that includes the Millenium Bypass to make it more plain.

Thanks a bunch.  It may not meet your own standards but I don't think there is any shame in empty holes.

As an aside this layout is also valid with 1/4W resistors if you don't mind "hair-pinning" them. 

That's one helluva game of Tetris, duck!   

hair-pinning. well, I've never heard them called that before. and now I'm all grown up and use perfboard -sniff- I don't do that stuff no more.

tetris, yes, but who's winning?

Quote from: duck_arse on September 08, 2015, 10:56:01 AM
hair-pinning. well, I've never heard them called that before....

Hair-pinning is when you stand a resistor on end and bend the leads in the shape of a hair-pin:

Compare to:


All I was saying is on your perfboard layout if somebody wants to use 1/4 Watt resistors instead of 1/8 Watt they could hair-pin the 1/4 Watt to make it fit 

Quote from: GGBB on September 06, 2015, 06:02:56 PM

Quote from: Transmogrifox on September 05, 2015, 07:57:53 PM
It is correct that the depth pot is connected to +9V on one side, but pin 1 vs pin 3 I don't know.

Can anyone who has this breadboarded verify those pot configurations? In particular the depth pot orientation - needs to work so that clockwise increases depth. I have completed a layout with on-board pot connections but will need to make a change if the depth pot is opposite from what's drawn in the schematic.

Bump. Anyone? Will your sim tell you T-x?

My layout is ready for the etchers out there, but needs this confirmed. Board mounted pots and LEDs - 1590B (2.2"x1.8").