simple 4046 biphase BBD clock

Started by Paul Perry (Frostwave), May 18, 2008, 09:06:19 PM

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Paul Perry (Frostwave)

A post my mate Ed Jones sent to synth-diy. But It's probably more relevant here - I'm sure he won't mind! Here's his post:

http://www.flickr.com/photos/loscha/2503124435/
As the description in Flickr explains,
"Circuit for using a CD4046 PLL to generate a voltage controlled BBD complimentary phase clock! I found this ripped out page on it's own in a stack of magazines I purchased Yesterday; Sunday 18th of May, 2008.
The previous owner was interested in the other side (some notes on there in pencil).
Thanks to Hugo Bramall of Canterbury, Victoria who came up with the circuit and sent it ETI magazine in the first place!"
The circuit is pretty low parts count. An op-amp (they suggest LM301 in the circuit) and a CD4046 PLL. A few resistors, capacitors and a trimmer pot fill out the plan.
I hope someone out there finds this useful, interesting or at least novel.

frank_p

Well, I find it very interesting from "any" point of view.  Thanks Mr. Perry.

CGDARK

Yes, the CD4046 is very good as a clock generator for BBDs. I have used it in previous designs in my company's chorus and flanger pedals until a year ago that I changed them for the matching BBD clock generator. The only minor problem is for a flanger you need to buffer the phase signals to get a strong flanger sound. You can check the John Hollis' designs to see what I mean.

Zombie chorus
http://www.hollis.co.uk/john/zombie.jpg

Ultraflanger
http://www.hollis.co.uk/john/ultraflanger3.jpg

Enjoy,

CG

frank_p

Thanks Mr. DarK.  :)
An other thing to put in my list.
This is neverending ?
...

Rob Strand

I remember that article from ETI (I've still got those magazines but I never look at them.)  The 4046 is a cheap and easy vco for BBD's.    The BBD's have a high input capacitance so a driving them with a single CMOS gate might not be the best way to do it - that's why JH uses the inverters.  I think the ETI project used BBDs with a small number of stages so they have less capacitance.



Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

StephenGiles

There was a Practical Electronics flanger article utilising SAD1024 and a 4046. I think it was designed by Tim Orr, so would not contain the "simple" aspects of Uncle Penfold's circuits! Unfortunately I lost my copy of the issue containing the article, but it would still be in the British Library......one day!!
"I want my meat burned, like St Joan. Bring me pickles and vicious mustards to pierce the tongue like Cardigan's Lancers.".

StephenGiles

"I want my meat burned, like St Joan. Bring me pickles and vicious mustards to pierce the tongue like Cardigan's Lancers.".

Mark Hammer

Quote from: Rob Strand on May 19, 2008, 12:39:58 AM
I remember that article from ETI (I've still got those magazines but I never look at them.)  The 4046 is a cheap and easy vco for BBD's.    The BBD's have a high input capacitance so driving them with a single CMOS gate might not be the best way to do it - that's why JH uses the inverters.  I think the ETI project used BBDs with a small number of stages so they have less capacitance.
Useful caveat, but it depends on not only the total number of stages/chips but the anticipated use and associated clocking frequency.  That's why the Ultraflanger HAS a buffer for more current drive, and the Zombie lacks one, even though they both use a 4046 and an MN3007.  The overarching objective is to keep the clock pulses as crisp and square as possible.  When the clock frequency is low enough (and you will note the datasheets for the Matsushita chips usually specs them for up to 100khz) the capacitance of the clock input pins poses no risk of corruption of the clock pulse waveform.  As the clock frequency ascends above 100khz the clock pin capacitance starts to act like a low pass filter, adding lag and "smudging" of the clock pulses.  Under those circumstances, the added current drive of the buffer shown in the Ultraflanger helps to keep the pulses crisp.

So, if one wishes to use the 4046 to provide a higher-frequency clock pulse, suitable for either generating ultra-short delays for flanging, or suitable for clocking higher-capacity BBDs to achieve echoes or chorus at higher-fidelity sampling rates, it is wise to use parelleled invertors to buffer the clock pulse.  If you are aiming for more modest delay times or clock frequencies, don't sweat it.

puretube

I prefer flipflopped outputs over exored ones (50/50);
3101 & 3102 can do, too...  :icon_wink: (after 4046)