CD3207GP - Manufacturer? Experiences? Datasheet?

[Thomeeque]

Hi!

Does have anybody experiences with this exact BBD chip? It is the easiest available MN3207 clone for me (in stock of local seller), so I'm looking for any info (and it's hard). I have bought one piece so far and it works, but optimal V_BIAS was cca 1V above value stated by Panasonic in datasheet (5.8V for V_DD=10V) and dialed for another MN3207 I have (labeled "MN3207" and with (M) logo - I don't know name of this manufacturer either actually). But this can be only one-piece issue.

Thanks, T.

[PRR]

> optimal VBIAS was cca 1V above value stated by Panasonic in datasheet (5.8V for VDD=10V)

I forget the internal details, but I think that if N and P devices were perfectly matched, the optimum would be half-supply.

N and P are never perfectly matched. This varies from batch to batch and from maker to maker. When making logic chips, the match can be pretty sloppy, since logic signals always slam the rails and should change so fast that the threshold is passed-through very quickly. BBD are made on (old) DRAM process but rewired and re-specified as analog memory shift-register. As long as the "center" voltage is not real close to either rail, you can trim the bias, and it is fine.

[Thomeeque]

 Thanks Paul for the insight!

Thing is that I often use one V_BIAS for whole circuit (for input/output buffers mainly), so I'd like to have it as close to center as possible - but you are right, V_BIAS=7V for V_DD=10V should be yet acceptable.

..if N and P devices were perfectly matched, the optimum would be half-supply. - Panasonic states those 5.8V @ 10V by this graph, there is probably yet something else inside pushing it bit up..?



Cheers, T.