JFET biasing methods in regards to repeatability of a design

Started by masinyourface, January 20, 2013, 09:32:52 PM

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masinyourface

As most in the electrical world are aware, devices using JFETS aren't used often in mass production due to the wide variations in their electrical characteristics. That being said, lately I've been scouring these here inter-webs trying to decide on a method on biasing a JFET boost I'm making when I ran across this article.

http://www.nt7s.com/blog/wp-content/uploads/2010/10/AN102FETbiasing.pdf

Apparently using one of these "combination-bias" techniques reduces variations from device to device. An amateur radio guy up in Oregon did a little experimentation with a bag of ten J211s and posted the following:



http://www.nt7s.com/blog/2010/10/jfet-biasing-investigations/



Alot of my friends have been begging for their own versions of the pedals I make. Could using one of these biasing methods make my original design repeatable without hand-picking JFETS that fall in the "sweet spot" ?

PRR

> JFETS aren't used often in mass production due to the wide variations in their electrical characteristics.

That... and in many-many situations, a BJT will beat the pants off a JFET.

Ponder the amplifier's "cathode resistance" (emitter in BJT, source in FET): at 1mA a JFET has Rs about 500 ohms, a BJT is 30 ohms. At 10mA, 160 versus 3. The BJT offers much more voltage gain, and with high hFE parts, very respectable current gain.

JFETs still make the simplest HIGH-impedance inputs. Commercially, this need is small. Anything above audio frequency, universal stray capacitance makes circuit impedances not-high.

JFETs survive as radio frequency mixers because their "soft gain" means lower cross-modulation than BJTs. (But even then, it is often possible to design good-enough without JFETs.)

> Could using one of these biasing methods make my original design repeatable without hand-picking JFETS that fall in the "sweet spot" ?

Maybe.

Current isn't everything. The Voltage Gain of a JFET amplifier also relates to Vto, the gate threshold voltage. A low threshold part will give higher voltage gain. This fancy bias does little or nothing to reduce Vto variations, except in that JFET processing and sorting tends to correlate Idss and Vto.

Also note that it puts source up at 4.3V. The drain can not pull-down any lower, actually not that far. Probably not below 6V. That's half of the available 12V. (At 9V the effect is worse.)

I -have- seen a very lovely musical instrument amp using similar techniques, except powered by +24V (and I now wonder if the company was able to select FETs better than a small builder could).

Looking at those numbers.... if you know your parts are all 11.7 to 14.2 Idss, you "should" be able to design the circuit to accept any part in this batch. That's +/-10%. Lots of fine stuff has been built around 10% resistors and +/-20% vacuum-tubes.
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chi_boy

So whadaya makin'?

An what criteria are you trying to meet?
"Great minds discuss ideas, average minds discuss events, small minds discuss people." — Admiral Hyman G. Rickover - 1900-1986

The Leftover PCB Page

masinyourface

I'm designing a booster/overdrive off the simple idea of a MOSFET driving a JFET into a bit of overdrive. It's the same base concept as Jake Nagy's Blue Magic, just with a different tone stack, modified MOSFET gain stage, and obviously a different setup on the JFET's bias. As I said in the original post, I'm bound to have friends wanting their own!  ;D  I want theirs to come out sounding pretty close to mine though, hence me looking into this biasing method :P

I planned on trying a 2N7000 - J201 combination to start out with since that's currently what I have on hand. I've gotten the 2N7000 MOSFET stage like I want it. It ends with a DC blocking cap so I'm not worried about the JFET biasing screwing with my MOSFET stage. Really all I'm trying to do here is allow for repeatability/consistency through biasing if at all possible. Because I'm such a perfectionist, I'm using 1% resistors. 10% just aren't accurate enough for me :P

chi_boy

So is it the bias voltage that needs to be consistent?  Or do you have to have JFETs that are the same for ALL parameters?

Either way how can you get away without some sort of hand picking?  Or at least some level of sorting / grouping. 

Maybe I'm missing the point.  Wouldn't be the first time. 
"Great minds discuss ideas, average minds discuss events, small minds discuss people." — Admiral Hyman G. Rickover - 1900-1986

The Leftover PCB Page

alanlan

It's not completely valid to compare the different schemes with the same value of source resistance Rs. The whole idea of AN107 is to use/allow a higher value of Rs which would normally reduce the resulting drain current as it produces more negative feedback. By combining a high Rs with positive bias on the gate allows ID to be increased to the required level. You can "undo" the negative feedback for signal frequencies by bypassing Rs with a suitable value cap if you want more gain. AN107 should get you what you need with reasonable accuracy.  I tried this out on a batch of J201 some years ago and managed to get within 15uA of 200uA design  ID. The IDSS values were quite varied. I have the figures somewhere.

masinyourface

After reading back through the original post, I'm just gonna go through my whole thought process real quick just to be clear. I tend to ramble on about nothing sometimes... :P

From what I understand (please correct me if I'm wrong), JFETs (in terms of DC purposes at least) act as a voltage-controlled variable resistor. That being the case, when the Gate-Source junction is biased with a certain DC voltage, the JFET, or for explanation purposes  the 'voltage-controlled variable resistor' will vary the resistance between the Drain-Source junction. The more negative the gate is with respect to the source, the higher that resistance is. When there's 0V on the gate with respect to the source, the lowest possible resistance occurs across the D-S junction allowing the JFET's full Idss to conduct. For amplification purposes, when a small AC voltage, in our case signal from a guitar, is applied on top of that DC voltage on the gate, the 'voltage-controlled variable resistor' varies in resistance and in turn creates an amplified version of the original AC signal.

That being said, from what I understand from the article, with this hybrid of self-bias and current bias, the drain current is more tightly controllable and in turn should diminish concern due to the electrical differences in a batch of JFETs. I realize that it's impossible to create a circuit that can be recreated to act the exact same in every instance, but I'd like to make my design as tightly controlled and repeatable as possible. That's why I'm using all 1% tolerance resistors and investigating this type of biasing.

In summary, obviously there will ultimately be some differences in parameters from JFET to JFET, what I'm trying to do is create a circuit using the hybrid of current/self-biasing that diminishes those differences and in turn has a sound that is fairly re-creatable. I'd like to be able to make a few of these for my friends without having to worry about minute differences in a box of J201s. Ultimately I guess you could say I'd rather use set resistor values in each pedal rather than worrying about an internal bias knob.

PRR

> JFETs ...act as a voltage-controlled variable resistor.

For small drain-source voltages.

Above a few volts it is more like a constant-current, varied by Vgs.

But darn the theory. How many friends could you have?? JFETs are cheap by the dozen, even hundred. Build your circuit, measure the resistors and voltages. Mock up your magic stage, with a socket (a DIP chip socket is fine; a ZIF socket is better but not cheap). Put JFETs through and sort them as Very-close, Close, and not-Close. You probably want to run a dozen quickly just to see what kind of spread you can expect.
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masinyourface

Quote from: PRR on January 21, 2013, 10:27:29 PM
But darn the theory. How many friends could you have??

Not that many actually...I suppose I'm just an unsatisfied perfectionist  ;D

Luckily I have some SIL sockets on hand. I'll just snap off a few for this project. I've actually never heard of ZIF sockets before. Did a quick Google search. Not bad! I've been pondering making something similar to the Beavis Board for experimentation. These ZIF sockets would work great for it! Many thanks!

I'll be sure to keep this thread updated with my progress. Hopefully I come up with something worthwhile!  ;D

R.G.

The devil makes me want to say:

If you want consistency in biasing a JFET, current bias it from the source side.

As long as the JFET can go to that current within the limits of the power supply and connected resistors, it will. The drain voltage will be rock solid. It has to be.

The gate-source voltage and transconductance will adapt themselves to make the channel current come true.

'Course, it gets tricky getting the unbypassed source resistance to where you want it, and bypassing the source for more AC gain, but the biasing is fixed.
R.G.

In response to the questions in the forum - PCB Layout for Musical Effects is available from The Book Patch. Search "PCB Layout" and it ought to appear.

chi_boy

Quote from: R.G. on January 21, 2013, 11:58:03 PM
The devil makes me want to say:

If you want consistency in biasing a JFET, current bias it from the source side.

As long as the JFET can go to that current within the limits of the power supply and connected resistors, it will. The drain voltage will be rock solid. It has to be.

The gate-source voltage and transconductance will adapt themselves to make the channel current come true.

'Course, it gets tricky getting the unbypassed source resistance to where you want it, and bypassing the source for more AC gain, but the biasing is fixed.


Google translate isn't working on this page.  Not sure why.    (Devil made me sat that too.)   :)


Seriously though, how would the average Joe DIY guy (non electrical engineer) put this suggestion to use?  Perhaps a brief explanation as it relates to a practical example or a commonly known JFET circuit??
"Great minds discuss ideas, average minds discuss events, small minds discuss people." — Admiral Hyman G. Rickover - 1900-1986

The Leftover PCB Page

PRR

> how would the average

Typically we run a 1K resistor source to ground.

If JFETs vary from 1V to 2V, we get from 1mA to 2mA current.

Instead run from source through 100K to a -100V supply. If JFETs vary from 1V to 2V, we get 101V to 102V across the 100K resistor, we get from 1.01mA to 1.02mA current. MUCH less variation from one part to another.

Actually a mere -10V would be effective swamping of typical JFET parameters.

Instead of large resistor and large negative supply, you can try to fit various kinds of "constant current sources" under the JFET source. However many of these get sloppy with less than a Volt of drop.
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greaser_au

#13
Quote from: masinyourface on January 21, 2013, 11:12:50 PM
Luckily I have some SIL sockets on hand. I'll just snap off a few for this project. I've actually never heard of ZIF sockets before. Did a quick Google search. Not bad! I've been pondering making something similar to the Beavis Board for experimentation. These ZIF sockets would work great for it! Many thanks!

This little box is intended for exactly this - as well as germaniums... :)    http://www.flickr.com/photos/14643956@N06/8408656126/in/photostream One random thing is that the recessed hole at top left is for a mini toggle (the power switch) that prevents the ZIF socket lever (well, makes it harder anyway!) from being operated while the power is on...

david

Bill Mountain

I know this is a brute force method that has a lot of variables still but I have in the past used a 30 volt supply and bias close to the middle with a test JFET and then put what ever similar model I had in it when it came time to build.  When using 30 volts biasing between 12-18 volts ain't gonna make much of a difference.  You may have issues if you want specific amounts of dirt but for clean gain this works well for me.

alanlan


you could try something along these lines (untested!) - without the cap there'll be zero gain at the drain but a very accurate follower at the source. 
As well as the cap across the constant current source, you could add a resistor Rs in series with the cap.  Gain will then be very roughly Rd/Rs.

The drain current can be set by adjustment of the resistor on the emitter of the transistor.  Roughly 0.6V/emitter R.  The drain resistor then sets the DC operating point of the drain. 

But whatever you do, your JFETs will still vary and each one will operate at a different point relative to IDSS on it's curve even though they will all run at the same absolute current.

I don't necessarily recommend this circuit - it's just an idea for experiment.

R.G.

Yep. That was the idea. Let the CCS force a bias voltage onto the drain, ensuring some kind of control of the operating point; then adjust gain with drain and unbypassed source resistors, while forcing the JFET to adapt itself to the operating current/voltage on the drain by adjusting its own Vgs to match the desired drain voltage.

As Paul noted, the CCS is going to need some work, but I think that's manageable. Good NPN bipolars should be able to get your CCS voltage handily under 2V, perhaps less with careful design. Once that's done, one sets the current level with a resistor value. As long as the CCS is trying to enforce a current less than Idss, the JFET should be able to adapt to the desired operating point, given only that (1) there is enough power supply voltage overall and (2) the necessary operating voltage for Vgs is not so large that it eats up too much of the power supply voltage, or so small that the CCS minimum voltage can't pull Vgs low enough.

It does take some thinking, but I think this puts some predictability into JFET biasing. I'll have to do some simulation on this one.

Of course, the CCS needs at least one and probably two NPNs, so the CCS is more complicated than the JFET stage. But we're all accustomed to doing a lot of dancing to get some vintage or extra-desirable part to do what we want it to, aren't we. As a final filip, CCSs can be ganged, with one reference section driving several "slave" sink stages, so it may be that with more JFETs, the CCS requirement shrinks toward one NPN per JFET.
R.G.

In response to the questions in the forum - PCB Layout for Musical Effects is available from The Book Patch. Search "PCB Layout" and it ought to appear.

masinyourface

Just an update...

Took me a bit to figure out the math, but I've got a working circuit now. Swapped out a few J201s, and I can hear some very minute difference between each, but it's nowhere near the difference from when I tried self-biasing them. Not quite the pinpoint predictability of a CCS biased JFET, but I've gotta say it's well worth it considering I'm only adding 2 more resistors as compared to a self-bias circuit. For the average DIYer not wanting to mess with a CCS and looking for a smaller part count, this is definitely worthwhile to look into. Haven't finished measurements yet, but so far I can already see improvement.