pushing MOSFETs into asymmetrical clipping

Started by mordechai, February 05, 2013, 10:49:31 AM

Previous topic - Next topic

mordechai

I read the following comment on a very nice blog about the Catalinbread WIIO and how the MOSFETs are deliberately slightly misbiased to get asymmetrical clipping:

"The biasing of the mosfets - not just 4.5v but altered via the offset 62k/100k voltage divider. Biasing the mosfets away from a central 4.5v forces them into asymmetrical clipping instead of their standard symmetrical clipping. Asymmetrical clipping better mirrors the manner in which a tube amp clips."

The comment was in reference to R17 and R18, I think, in this schematic:

http://revolutiondeux.blogspot.com/2012/05/catalinbread-wiio-rah.html

This is an interesting concept and I wonder if it can be applied to other MOSFET based circuits like the ZVex Box of Rock/Madbean Krankosaurus.  How might it be implemented there?   What about other options...such as, for example, mismatching the drain resistors on the different MOSFET stages (i.e., having one MOSFET with the 5.1K [a 1.2K and a 3.9K] and another with a 3.3K and another still with a 4.7K)?

brett

Hi
I'm no expert, but will make a couple of comments..
MOSFET inverters (e.g. in a CD4049UBE, 4069) have been offset for years (I think the MXR envelope filter does this with a 4069). I doubt that too many people get too excited about it.
Also, the idea that it better mirrors tube amp clipping isn't necessarily true. Their comment also seems to imply that symetrical clipping is common - but it is quite difficult to achieve. BJT gain stages are often quite asymetric. Tube stages are sometimes quite symetric.

My impression is that asymetry has to be quite pronounced before it is obvious. Q1 in a fuzzface is quite obvious. My guess is that the output of Q1 swings about 0.2V on the 'high' side and 8V on the 'low' side. To offset a MOSFET like this would take some serious messing, and I suspect that individual devices would need 'tuning' to work.
cheers
Brett Robinson
Let a hundred flowers bloom, let a hundred schools of thought contend. (Mao Zedong)

electrosonic

RG mentioned somewhere the idea of using a LM386 to supply the bias voltage for a circuit - the output sits halfway between Vcc and gnd. I was thinking maybe you could use an envelope detector to drive the input of the lm386 to misbias the circuit. The idea is to simulate the sagging of a tube amp under load.  Never got around to trying it out though.

Andrew.
  • SUPPORTER

Bill Mountain

I didn't realize you used a bias voltage for Mosfets.  I always just thought they were individually biased (like JFETs).  All this is doing is setting the voltage at not-half-way so it will hit one of the rails before the other.  Clipping one side of the waveform before the other making it asymmetrical.

It would be the same as biasing a JFET or an opamp at 6 volts (or 2/3 supply).  I do it all the time to lower the headroom and get a faster onset of clipping.

mordechai

Bill, I have had similar results in that sort of biasing of JFETs.  What I'm curious about here is exactly how the 62K and 100K resistors are accomplishing this at the outset of the power source as it hits the rail and is distributed across the other MOSFETs.  I am also not clear what the 10uF cap is doing there...is it essential to the process?  Or would the 62K/100K resistors wired in parallel with the 100uF cap do the trick on its own?

Bill Mountain

#5
Quote from: mordechai on February 05, 2013, 09:04:27 PM
Bill, I have had similar results in that sort of biasing of JFETs.  What I'm curious about here is exactly how the 62K and 100K resistors are accomplishing this at the outset of the power source as it hits the rail and is distributed across the other MOSFETs.  I am also not clear what the 10uF cap is doing there...is it essential to the process?  Or would the 62K/100K resistors wired in parallel with the 100uF cap do the trick on its own?

The 62/100 is a voltage divider on the power supply.  The same way you set up Vref for opamp circuits.

http://www.raltron.com/cust/tools/voltage_divider.asp

This gives you a bias voltage of 5.556V.  The 10uf cap is for standard power supply filtering.

I think you're over complicating things (something I'm quite guilty of myself).

Bill Mountain

#6
To be honest, I'm not sure why it is biased like this at all.  I may need to research MOSFETs (I never use them) but I feel like this can be achieved in other ways.

Edit: Nevermind.  Using a Vref and instead of voltage dividers on the input can save resistors in a multi-MOSFET circuit.  It's the same reason most people don't use a voltage divider in front of each opamp stage.

mordechai

Bill, I definitely over-complicate things out here!  But I'm also still facing a steep learning curve so I want to hash out what I can while I can. 

I think what is confusing me about the schematic is the difference between the symbol "B+" coming off the 100uF cap and the symbol "VB" coming off of the 10uF cap.  I am guessing that B+ is simply a siglum for the power rail, since elsewhere on the schematic, various components connect to "B+" where I think they would otherwise be indicated as connecting to the power rail.  But I'm not saure what "VB" is doing...a bunch of the 10M resistors in the schematic connect to it...what is it?  Is it a sort of alternate power rail?  If so, is it there so that the 10M resistors connect to a power supply that provides an altered source voltage than the components that connect to B+...and is that what accounts for offsetting the biasing of each MOSFET to get them to clip asymmetrically?



defaced

VB = voltage bias. 

C10 is the power supply filter cap
R17 and R18 provide the voltage divider for the bias voltage
C14 decouples the bias voltage from ground
R1, R2, and R3 are hi impedance connections to the bias voltage.  Think of them as very weak pull up resistors.  No current is flowing through them, so even a tiny signal can wiggle the gate around and cause the MOSFETs to do their job.   
-Mike

Bill Mountain

Quote from: mordechai on February 06, 2013, 11:48:44 AM
Bill, I definitely over-complicate things out here!  But I'm also still facing a steep learning curve so I want to hash out what I can while I can.  

I think what is confusing me about the schematic is the difference between the symbol "B+" coming off the 100uF cap and the symbol "VB" coming off of the 10uF cap.  I am guessing that B+ is simply a siglum for the power rail, since elsewhere on the schematic, various components connect to "B+" where I think they would otherwise be indicated as connecting to the power rail.  But I'm not saure what "VB" is doing...a bunch of the 10M resistors in the schematic connect to it...what is it?  Is it a sort of alternate power rail?  If so, is it there so that the 10M resistors connect to a power supply that provides an altered source voltage than the components that connect to B+...and is that what accounts for offsetting the biasing of each MOSFET to get them to clip asymmetrically?




It is a 2nd supply voltage.  It sets the operating point for the MOSFET.  The signal (wave) starts at the VB and rolls up towards 9V (B+) and down towards 0V (ground).  It takes a while to visualize but it basically gives the signal a middle point.  Since that middle point is slightly above half way it clips the tops of the wave form sooner.

defaced

#10
 Call it a second supply, call it a bias voltage, it makes no difference, the function is still the same: it turns the MOSFETs on.  You and I are using different words to describe the same thing.  

QuoteNo current is flowing through them, so even a tiny signal can wiggle the gate around and cause the MOSFETs to do their job.   
equals
QuoteThe signal (wave) starts at the VB and rolls up towards 9V (B+) and down towards 0V (ground).
-Mike

Bill Mountain

Quote from: defaced on February 06, 2013, 02:23:08 PM
Call it a second supply, call it a bias voltage, it makes no difference, the function is still the same: it turns the MOSFETs on.  You and I are using different words to describe the same thing.  

QuoteNo current is flowing through them, so even a tiny signal can wiggle the gate around and cause the MOSFETs to do their job.   
equals
QuoteThe signal (wave) starts at the VB and rolls up towards 9V (B+) and down towards 0V (ground).

No argument here.  I'm trying to say it in as many ways possible to help the OP.

defaced

Sorry about that.  I didn't read very closely and thought you quoted my post, not the OPs reply.  I'll go back to my corner now :icon_redface:
-Mike

mordechai

Bill and Defaced...I think I understand this better now, so thank you.  The next question is -- do R1, R2 and R3 function equivalently to the R2, R7 and R11 (all 1M) on the ZVex Box of Rock (madbean krankosaurus)? Here's the schematic:

http://www.madbeanpedals.com/projects/Krankosaurus/docs/Krankosaurus_ver3.pdf

What I am not seeing on the Catalinbread schematic are resistors akin to the R4, R6 and R10 on the BOR/krankosaurus.  On the Catalinbread WIIO, I see R12 at 1K and R16 at 130R...and no resistor to ground at all in front of Q2.  Are gate-to-ground resistors on MOSFETs (and ones that match the drain to gate resistors) not essential in biasing them correctly?  Going by the topography of the BOR/krankosaurus, I would have thought that the 10M to VB on the WIIO would require a 10M from gate to ground...akin to the setup in the ZVex SHO.  What am I missing here?

nocentelli

#14
I think..... the WIIO uses a 62k/100k to provide a vref: The gate is connected to this vref supply via the 10M resistors. The BoR uses a 1M/1M to provide vref, but does not use another resistor to connect to this supply: The divider is conected direct to gate.
Quote from: kayceesqueeze on the back and never open it up again

defaced

Ok, that time out didn't last very long  :icon_lol:

Not really.  Look at the two 1Ms at each gate as serving the same function as R17 and R18 in the other schem.  Instead of having _1_ bias voltage point, the Krank is biasing each MOSFET individually. I know that this effects input impedance (the Krank having a lower input impedance than the Cat), but also isolates the biasing arrangement which I could see helping to prevent possible cross talk/feedback problems.  The other thing happening here is that because the "upper" 1M is tied to the drain MOSFET, there is some amount of negative feedback being applied to the input signal - how much I'm not sure, I'd have to dig up a reference to see.  

Edit: Looks like I cross posted with nocentelli, but since I had this typed, I figured I'd post it. 
-Mike

mordechai

So then, if one were to replace the 1M/1M resistors in the BOR/Krank with a different arrangement (say...4.7M drain-to-gate and 2.2M gate-to-ground), this would also yield a slightly offset bias and move the MOSFET toward asymmetry (and, maybe, yield higher impedance because of the higher M values).  Do I have that right?

But this would then have to be applied at each MOSFET stage because they are set up for individual biasing, correct?

defaced

Correct on both accounts.  There are limits though, and it will depend on the MOSFET.  The MOSFETs typically used in a stompboxes are enhancement mode devices.  Meaning, they are normally off and need to be turned on by some bias voltage.  In the data sheet you will see a series of drain source current (Ids) vs drain source voltage (Vds) curves.  Each curve will have a gate source voltage (Vgs) next to it - that's the bias voltage of the gate relative to the source.  So you can see, if you reduce Vgs below some threshold (3 volts in the case of the 2N7000 MOSFET linked to below), the device is basically off - meaning, no current is flowing (Ids ~= 0).  If you exceed some threshold, you will eventually cause the device to over dissipate (Pdevice = Ids * Vds) which is a function of the package, ambient temperature, and heat sinking (if there is any).   

Page 4, Figure 1
http://www.mouser.com/ds/2/149/2N7002-8405.pdf

If you pop "mosfet bias" in to Google alot of PDFs pop up explaining this.  Some have lots of picture (I like pictures), others have lots of math (I like math after I understand the pictures).  You might get some benefit out of looking at them.  I found these two to cover the material in ways I think might work well for you (they contain examples of each way of biasing the MOSFET).
http://aries.ucsd.edu/NAJMABADI/CLASS/ECE102/11-W/NOTES/ECE102_W11-LecSet-2.pdf
http://users.ece.gatech.edu/mleach/ece3050/notes/mosfet/fetbias.pdf
-Mike

mordechai

Thanks for the links...I have a hard time processing mathematics, but I can grasp some of the broader concepts at work, I think.  If I understand your earlier comment correctly, a slight mismatch on the drain-to-gate resistor and the gate-to-ground resistor could be effective if the goal is to move the mosfet to asymmetry, and a high impedance component selection could be effective (so, for example, the 4.7M and 2.2M combination I mentioned), but there are limits both up and down in terms of how effective the value of those components can be.  Since the ZVex SHO uses 10M resistors, I am guessing that the ceiling for efficacious function is relatively high if one wanted to go with a high impedance scenario, but are you saying, then, that one could not expect to bias the mosfet with resistors much below a certain value level (i.e., much below a 1M value) and have the mosfet turn on?

I am still, also, a bit confused about the gate-to-ground resistors in the Catalinbread circuit on Q1 and Q3.  If they are not contributing to the bias of the mosfet in question, what purpose are they serving?  Are they just pull-down devices to safeguard against static or unwanted current? 

defaced

Quotethat one could not expect to bias the mosfet with resistors much below a certain value level (i.e., much below a 1M value) and have the mosfet turn on?
Correct.  Unlike BJTs that need current to flow through them to turn on, MOSFETs do not - they just need a voltage.  Since low value resistors allow lots of current to pass without anything going into the gate of the MOSFET, it ends up being wasted energy.  Further, because your guitar signal has very little current, and even less when it goes through the amplification circuit, the more current flowing through the resistors the more it acts to keep the voltage at that point constant. 

So for example (I'm going to tweak the numbers to make them easy), if you used 5k resistors to form the bias divider, and you had a 10v supply, you'd have 10v = 10,000R * I, so about 0.001 amps (or 1 ma) flowing through the divider.  So you'd need a signal that can deliver significantly more than 1ma to swamp that static current and force the gate voltage to mover around - that's difficult for a passive guitar pickup, but it's done all the time (see BJT fuzz circuits).  But now if you use 5M resistors, 10v supply, 10v = 10,000,000R * I, so about 0.000001 amps (0.001 ma). Now it takes a tiny amount of current to swamp the static current flowing through the resistors and move the gate around.  Because the bias voltage is the voltage at the junction of the divider, and you want a high input impedance, these two properties work together to define the appropriate order of magnitude of the resistors - if you are going to use this bias scheme.  In other words, because no current flows through the MOSFET gate, and you want high input impedance, big resistors are appropriate here.  Their ratio determines bias voltage.  The gate to ground resistance determine input impedance. 

QuoteI am still, also, a bit confused about the gate-to-ground resistors in the Catalinbread circuit on Q1 and Q3.  If they are not contributing to the bias of the mosfet in question, what purpose are they serving?  Are they just pull-down devices to safeguard against static or unwanted current? 
I'm not seeing gate to ground resistors on the Catalina bread circuit.  I see gate to bias voltage resistors.  Think of these as adding to the bias voltage to ground resistor to make a higher input impedance but without messing with the voltage divider of the bias voltage.  This allows you to have a very stout (low impedance - lots of current - very stable) bias voltage but also have high input impedance of a given stage.   You can have your cake and eat it too, per se.
-Mike