Coupling capacitors for multiple mu amp stages

[Unkn0wn Art1st]

Using a smaller value for the cap between the upper gate and the lower drain to high-pass filter the signal is pretty common for BSIAB variations, but doesn't it mean that all the low end is still going into the bottom JFET's gate, overloading the input? What if I put in small blocking caps instead, and run the mu amps at full bandwidth? Does it make any sense?