Paradigm Shifter

[Eb7+9]

the old way : choose carefully selected jFET's that will accommodate a circuit that produces a single CV drive signal used to modulate channel resistances in unison ... but in a restricted manner as to produce relatively modest amounts of phasing safely (ie., without any glitches)

the new way : design a CV drive circuit that will accommodate random/un-matched jFET's to modulate channel resistances in unison ... but in a full range manner (for each device) so as to produce a maximum amount of phasing available from the technology

---

MXR's Phase45 and Phase90 were the first compact jFET phasor designs to hit the market ... with a SPEED control only, there was no way (even with mods) to include a DEPTH control, or to extend the amount of phasing - except by using very tightly matched devices ... the bane of many DIY'ers

the reason for this has to do chiefly with the LFO designs used therein ... a quick look at how the P90 LFO operates can give clues as to what is possible (and not) with the stock circuits ... Pspice simulation software plays a handy role in highlighting the properties of the P90 LFO circuit for example:

http://www.diystompboxes.com/smfforum/index.php?topic=116338.0

much could be said here, but the bottom line is that in this instance jFET's need to be chosen against the operating properties (and range) of the LFO design ... which to me sounds quite backwards in function

of course, in the day that strategy served its purpose well // especially when considering how manufacturing imposes conditions that a DIY'er building a small number of units wouldn't have to deal with ... for one, having large sample volumes on your side meant that "finding" relatively well matched device pairs and quads became easier and somewhat more practical ...

still, to the DIY'er building a single unit or two this imposes a certain level of wasteful redundancy, not to mention time and cost ... add to that the influence of questionable resources found here and there on the net, as I've pointed out enough times already

---

let's take a step back ...

first of all,  a phasor circuit doing its thing merely requires elements of variable resistance modulated in unison ... the signal path cares not how the variation in resistance is produced; whether by way of optical means, jFET's or PWM'd gates ... and when using jFET's, again, the circuit cares not how the variation in resistance is produced, esp. what the specs of the devices might be or even how exactly the modulation takes place electronically ... the assumption that "matched" devices are required for building a successful jFET phasor is implicit in the type of drive circuit // typically like the MXR circuits, using a single control voltage to drive all Gate nodes in unison

questioning this assumption can lead to building a full range phasor that makes use of (randomly) un-matched devices ...
in what follows I will show how to do this

---

before starting, it is important to understand how jFET's are used in VCR applications ...
to this end, the following app note needs a careful perusal:

http://www.vishay.com/docs/70598/70598.pdf

the bottom line here is that jFET's operating as VCR's do so in a restricted range of control voltage
lying between 0volt and Vp or Vgs(off) ... ie., the voltage where channel resistance becomes infinite ...

so, let's assume we want to build ourself a four stage phasor like a P90
and to this end we've bought four random 2n5457 devices from Steve at Smallbear,

(note: all jFET's used in a VCR capacity suffer from non-linear headroom distortion, and one type of jFET device isn't any better over another in this respect... ie., they all cause the phasor circuit to start clipping when signals reach around 100mv pk-pk ... why I haven't built a jFET based phasor in years ... but I digress ...)

In order to provide ourselves with the degree of control and flexibility that a DIY approach might demand we need to reconsider how the LFO signal is applied to the Gate terminal of these jFET devices ... in the same vein of thought as my other phasor designs, including my well known Univibe mods, an OFFSET control is included on top of DEPTH/INTENSITY and SPEED controls ... what this does is allow the user to precisely control the CV range within the 0-Vp limits, from being able to traverse the whole range completely (which neither the P45 or P90 can do by design), or only part of it ... allowing the modulation to focus more on one side of the range, than the other ... and vice versa ... still, the chief goal here would be to achieve limit-to-limit modulation in order to produce the maximum amount of phasing obtainable from the circuit ... with a DEPTH control to restrict the width to taste, etc ...

http://www.lynx.net/~jc/P90lfomultioutput.jpg

---

HOW IT'S DONE ...

the first thing we need to do is characterize our four devices in terms of Vp ... by using a 9volt battery and a single DMM we can "order" the devices and extract a somewhat accurate estimate for Vp ... by sticking a voltmeter in the Source circuit of a common-source jFET circuit we can directly measure this value // the high resistance of the DMM brings us very close to measuring the true Vgs(off) value ... if, say, there were any need to properly match or characterize the device we could then measure an approximate value for Idss, again using a 9volt battery and a DMM // but this isn't necessary here ... all we need is a good estimate for Vp1, Vp2, Vp3 and Vp4 // and then decide which device has the greatest Vp value (in absolute terms) ...

http://www.lynx.net/~jc/jFETVpIdss.jpg

http://www.lynx.net/~jc/jFETsampleVp's.jpg

the idea is to produce a CV waveform that will traverse the 0volt-to-Vp1 range ... the most logical approach for full range operation is to start off by setting the zero-DEPTH (idling) point to Vp1/2 and then setting an amplitude level of Vp1/2 so that the extremes in modulation go from 0volt to Vp1 ... whether a triangle-wave, hyper-triangle-wave or sine-wave LFO signal is used makes no difference, these limits define the full range of resistance variation, from Ron (Vp/Idss) to infinity ...

http://www.lynx.net/~jc/jFETun-matched.jpg

In this diagram the Idss values are shown to be ordered proportionately, but this need not be so ... the main thing is to know which value of Vp is the greatest ... the idea behind this whole strategy is to "scale" the CV voltage applied to jFET-1 to the other three in commensurate proportion so that their whole range is also traversed exactly in unison with the traversing of 0-Vp1 for the top dog device ... and, likewise, their idling point (set by the OFFSET control) also follow proportionately as well

to this end we would define a2 = Vp2/Vp1, a3 = Vp3/Vp1 and a4 = Vp4/Vp1

the circuit that does this for us is presented below, using a triangle wave LFO as modulation engine ... notice that three 1Meg trimmers are used to scale down the voltage swing once the swing and idling positions have been set for the first jFET device ... using a DMM to set the trimmers ... the important thing to notice here is the fact that these 1Meg trimmers are grounded, in contradistinction to the DEPTH control ... this guarantees a 0volt to 0volt translation, which is crucial

http://www.lynx.net/~jc/jFET-Vp-ratios.jpg

with Vp values presented here we would calculate the scaling ratios as

a2 = 0.852, a3 = 0.722, and a4 = 0.971

therefore, with trimmers measuring exactly 1Meg we would set the positions by measuring leg resistances as follows ...

852k ohm // 722k ohm // 971k ohm

with trimmers just off of 1Meg a little more math would be required ...
btw, 1Meg is chosen as to not load down the (5k) drive pot

here is the driver circuit that does all this ...

http://www.lynx.net/~jc/jFET-LFOdriver.jpg

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NOTES:

(i) the circuit shown above is designed for a bi-polar supply scenario ... and can easily be adapted to a single-supply case

(ii) the variable 100k resistor shown at the output of the LFO block acts as a range limiter, and is adjusted after the Vp1/2 OFFSET voltage is set ... once this is done, a DMM can be used (with LFO in super slow mode) to adjust the range limiting trimmer so that max voltage at top end of the DEPTH pot reaches 0volt exactly, or as close as possible ... a little less than 0 is better than a little over ...

(iii) phasor circuits typically have snubber resistors placed in parallel with the jFET's as a means of limiting the resistance variation range, and also for masking the effects of crossing over into infinity (why they are so low in the P45/P90 circuits) ... what the snubbers do also is guarantee a DC path to ground for the op-amps ... if snubbers are to be avoided altogether, ie., allowing theoretically unlimited resistance, then care needs to be exercised in setting the control voltage limits so that op-amps don't go slamming into the rails as a result of loosing ground reference ... in practice, it is unlikely that going that far will provide any useful phasing action anyway - but it's good to keep this in mind ... 10Meg snubbers might not be a bad idea at that point, though even at that range the phasor notches are likely to be lying well below the audible range (and prove useless)

the idea here is to go well beyond the 20k/22k limits seen in the P45/P90 designs and to achieve much deeper phasing as a result ... how deep will depend on taste and experimentation

---

the drive circuit presented here is original and normally I would say "for non-commercial blah blah ..."

but let's face it, this might well change the game for some people and the urge to make/sell a variant of the idea should well prove difficult to resist ... so I say, go ahead, make a buck with this if you want, I haven't posted a "gift" circuit on this forum for a while ... if it puts food on your table, I'm happy

with this idea the so-called matching of jFET's and all the BS and confusion that came with it might become a thing of the past ... I will provide a full phasor schematic once I'm done with my upcoming gigs

happy ho-ho's, ...
~jc

[StephenGiles]

Fascinating stuff. I'll look forward to seeing this

[greaser_au]

This is very interesting. We have a handful of parameters to consider, Idss, Vgsoff, the linearity of the channel ohmic curve between the two, and where exactly to pick out the bite of 'VCR' we need (ref the vishay article).  To take this idea to extreme,  I imagine we'd need per-stage offsets and curves tweaked to achieve a really good match between stages without some (at least) coarse similarity in the FETs... (and this ignores tolerances/non-linearities in the other components).

The next step is, of course, a dsPIC and a little code which would make it easy (in theory) to create very linear phase-shift stage(s) - but there's *NO* mojo in there!

best wishes for a happy christmas from down under,
david

[Eb7+9]

thanks for the good wishes,

figure 3 in the Vischay notes shows a normalized rds response, going form 0 to 100%
with 100% representing Vgs(off) or Vp ...
though, for n-channel devices the curve would be flipped horizontaly when looking at it in the {Vp,0} domain

the curvature is prescribed by the device physics and is the same from one device to another once normalized

what I'm seeking to do with this approach is tune the LFO output (at the DEPTH sweeper) to
traverse whatever bite (as you say) of the 0-Vp1 range and by setting the trimmers according to Vpi/Vp1 ratios
yield the same range for the other devices, once normalized that is ...

simply pick Vp1 to be the largest in magnitude

so if I set the idling position at Vp1/2 and the DEPTH/range-cutoff controls so that Vg1 goes between 0 and Vp1
then Vg2 will also range between 0 and Vp2, Vg3 between 0 and Vp4, etc etc ... ie., all run full range

the key here is that all devices will traverse the same normalized range as it is chosen for Vg1
and the other gates would receive the same relative range of control voltage

the phasor aspect of the circuit would be no less the wiser for it
that is, it wouldn't know the difference if the symmetric change in channel resistances
came by way of four matched devices or not

in other words, the end result leads to tracking of non-linearities in proportion to each CV ratio

... test PCB is on the way

~jc

[Eb7+9]

the build instructions are up ...
prototype sounds great

have at 'er

http://viva-analog.com/the-paradigm-shifter/

[Eb7+9]

parts kit at Smallbear store library ...

http://diy.smallbearelec.com/Library/PartsLists/PartsLists.html

[Mark Hammer]

Fair to assume that if one does not have any 10M resistors handy, that more commonly-available values like 2M2 or even 1M will work out just fine, given how they are still much larger values than 22k/24k?

I get the sense that 10M is to address virtually any FET-to-FET variation in a worst-case scenario, but that the trimmer arrangement still copes well with lower max-resistance values.

[Eb7+9]

it's to safeguard against CV accidentally falling below Vgs(off) ... ie., Vp1

in which case the VCR jFET's would no longer be providing a DC path to ground

if it were not for this resistance the op-amps would slam into the rails upon reaching Vgs(off)
otherwise, as long as CV is well controlled, no resistance is really need

you can make it work with whatever resistance you want, 2M2 is fine ...

to compare sound and to verify validity of the idea, once you have it working snip those guys to see what happens // it's easy to reverse later ... keep your test amp set on low when doing this testing
op-amp slams are not pleasant to listen to

the lowish 20k/22k of the P45/P90 is to limit the phasing range
and help mask the effects of Vgs(off) mismatch

[Eb7+9]

John Snyder has just drawn up and posted a 2-layer PCB for this project:

https://oshpark.com/shared_projects/qEOXas1Q

... looking for pro and fast PCB work, John is da man

http://www.electronicaudioexperiments.com/

[merlinb]

there was no way (even with mods) to include a DEPTH control,

Just to be pedantic, it is in fact very easy to fit a depth control to the Phase 45. Harder with the Phase 90 because of the transistor rather than opamp output. But that isn't really relevant to your excellent idea for separate trimmers for unmatched FETs 

[Eb7+9]

not pedantic at all Merlin, thx for pointing this out

I was mainly referring to the Phase90 ... mainly because of the low-drive of the LFO circuit,
it would be possible using a 10Meg pot if you could find one (I've seen 'em ...)

in my Phase45 mods I got around that by using a MIX control on the output

Ideally speaking, I think if we're going to have a DEPTH control on a phasor LFO
we need the circuit to have widest operating range available
and use the the control to select the exact desired operating width ...
otherwise it doesn't make that much sense to have that control

hence, why the Phase 45&90 were originally set up the way they were ... (?!)

[DrAlx]

Very nice idea   I am surprised that no one thought of this before !!!

I see how having 4 CVs allows the four FETs to all reach pinch off at the same time (assuming one actually wanted to push the sweep that far).
I was wondering how the 4 Rds values compare with each other at the other end of the sweep (i.e "Rds_on" for Vgs = 0).  My first thought was that if the variation is relatively small (e.g. +/- 5% like cap tolerances) then this really does look like a good way of doing things.  But then thinking about it a bit more, I came to the conclusion that even a relatively large variation in these Rds_on values does not matter with your scheme.  If I understand things properly, your scheme makes sure that the FET resistances maintain the same constant of proportionality during the sweep.  That means the phaser notches will move nicely.

Here's an example with 4 all-pass filters.

Mimatched R values:   R, 2R, 3R, 4R
http://www.wolframalpha.com/input/?i=plot+abs(+1+%2B+((1-ix)*(1-ix*2)*(1-ix*3)(1-ix*4))%2F((1%2Bix)*(1%2Bix*2)*(1%2Bix*3)*(1%2Bix*4)+))+from+0+to+5

Matched R values:  2.21R, 2.21R, 2.21R, 2.21R  ( 2.21 is the geometric mean of 1,2,3,4)
http://www.wolframalpha.com/input/?i=plot+abs(+1+%2B+((1-ix*2.21)%2F(1%2Bix*2.21))%5E4)+from+0+to+5

See how similar the curves look.   The main differences are in the upper frequencies. 

Mismatched R values (or C values for that matter) aren't a problem so long as the ratio of those values stays constant during the sweep. The reason being that all that sweeping up/down will do in this situation is uniformly stretch/compress the above pictures in the horizontal direction.  The end result being that the notches move in a "natural" way. I'm not referring to the sweep being linear or hyper-triangular, I just mean that you will not get odd behaviour like some notches moving a lot more than others.

[Eb7+9]

Very nice idea   I am surprised that no one thought of this before !!!

I'm not really ... but thx for the compliment

I see how having 4 CVs allows the four FETs to all reach pinch off at the same time (assuming one actually wanted to push the sweep that far).

the idea is NOT to suggest they be pushed that far, since well before that point your notches will have landed in the sub-audible range using the usual Cx cap values ... instead we'd like to have unlimited range so that the user can select exactly how far they'd like to go without any first hand restrictions ... simply, having a full control range available to play with and then cutting down to taste

but more importantly, the goal is is to have an identical (normalized) control range in all devices simultaneously ... the same way a properly matched set would against a common/identical CV voltage

if you want to go down to 95% of Vgs(off) they'll all go to 95% of their respective Vgs(off) limits, ...
80%, 20% ...whatever ... the control ranges will all match/track within the accuracy of the trimpots and Vgs(off) measurements

I was wondering how the 4 Rds values compare with each other at the other end of the sweep (i.e "Rds_on" for Vgs = 0).  My first thought was that if the variation is relatively small (e.g. +/- 5% like cap tolerances) then this really does look like a good way of doing things.  But then thinking about it a bit more, I came to the conclusion that even a relatively large variation in these Rds_on values does not matter with your scheme.  If I understand things properly, your scheme makes sure that the FET resistances maintain the same constant of proportionality during the sweep.  That means the phaser notches will move nicely.

I prefer to use the word "uniformly" ...

yes, the main aspect here is about CONTROL ...
ie., the first/dominant requirement in designing a full sounding phasor circuit

where each CONTROL VOLTAGE RANGE is now "matched" to each device's Vgs(off) value ...
and set to whatever maximum proportion thru the combination of DEPTH and OFFSET controls

then comes the RESPONSE part ...
which begs your question: what about Rds mismatch ...?!

Here's an example with 4 all-pass filters.

Mimatched R values:   R, 2R, 3R, 4R
http://www.wolframalpha.com/input/?i=plot+abs(+1+%2B+((1-ix)*(1-ix*2)*(1-ix*3)(1-ix*4))%2F((1%2Bix)*(1%2Bix*2)*(1%2Bix*3)*(1%2Bix*4)+))+from+0+to+5

Matched R values:  2.21R, 2.21R, 2.21R, 2.21R  ( 2.21 is the geometric mean of 1,2,3,4)
http://www.wolframalpha.com/input/?i=plot+abs(+1+%2B+((1-ix*2.21)%2F(1%2Bix*2.21))%5E4)+from+0+to+5

See how similar the curves look.   The main differences are in the upper frequencies. 

yes, where gtr harmonics live ... hardly at all in a typical 80-120hz gtr fundamentals range
where the bulk of the effect takes place

I understand that you chose extreme variations in resistance to make a point
but we know these kind of variations wouldn't occur following a proper Vgs(off)-based test methodology
(more about this below)

btw, thank you for introducing me to wolframalpha.com ... pretty nifty
tho S-domain functions are probably a little abstract for most folks in this forum ...

I tend to work with SPICE and plot out phase/magnitude responses
there it's easy to measure things like Q variation in notch profiles, as well as a lateral displacement
following the mismatch of rds (AC) resistances, say ...

(certainly, there are grounds for confusing the AC and DC aspects in this part of the circuit)

just wanted to add that there are other aspects in the overall design philosophies to consider as well ...

since the ear responds linearly to logarithmic frequency variation
these +/-5% variations (or even a bit more) tend to produce shifts that appear quite negligible to the ear
you know this already ...

of course, random cap variations becomes a moot point since capacitors can be measured easily and accurately if one felt the need ... conversely, let's remember that cap values can also be intentionally mismatched for "effect" as I wrote about in my "Univibing" Small-Stone mods :

http://www.lynx.bc.ca/~jc/pedalsSmallStone.html

in other words, the Response part can be made variable, either thru rds and or Cx // either randomly, or intentionally ... it can either be made tight or loose; thru precise measurement of Vgs(off) and caps we have control over either aspect if we want

the Control part can therefore be regarded as primary ... the Response part, more of a secondary thing ...

hence the need to accurately estimate Vgs(off); in both matched or un-matched design philosophies ... the un-matched approach simply does away with necessitating larger lots of devices to choose from, that's all ...

the goal in both cases is the same

Mismatched R values (or C values for that matter) aren't a problem so long as the ratio of those values stays constant during the sweep. The reason being that all that sweeping up/down will do in this situation is uniformly stretch/compress the above pictures in the horizontal direction.  The end result being that the notches move in a "natural" way. I'm not referring to the sweep being linear or hyper-triangular, I just mean that you will not get odd behaviour like some notches moving a lot more than others.

bingo, that's the whole idea ...

I wanted to work with a Linear LFO waveform to stay in Phase45/90 territory ...
to see if we were able to hear an improvement in sound from following this strategy
(last week I drew up a new way to do hyper-triangle and I'll be building that in the next few days)

now just to get back to rds variation ...

where Ron = rds (Vgs=0) is the minimal incremental resistance value available from the device

if, looking at a real example, we go back to the tabulated data I did for my three batches of 2n5457 devices

ie., the VpIdss data file found here: http://viva-analog.com/characterizing-and-matching-2n5457-jfet-transistors/

have a look at my data for Vgs(off) = -1.43v

you'll notice 8 values for Idss approximations ...
(ignore the first black number as it belongs to a questionable lot of devices)

2.88m 2.92m, 2.94m, 3.15m, 3.16m, 3.16m, 3.17m, and 3.18m

we know (or should by now) that rds(on) = -Vgs(off) / Idss

if we accept these numbers for Idss (yes, there's a small degree of error there)

then the rds(on) values will come out as

1.43/.00288 = 497ohm(AC) 490ohm(AC) 486ohm(AC) ... 450ohm(AC)

again, we're talking incremental resistance and not DC resistance

this gives an idea of the span of minimum resistance in those 8 devices for which Vgs(off) = -1.43v
and therefore gives an idea also of the proportional deviation in resistance as CV heads towards Vgs(off)
(again, that's part of my whole point here)

let's take the middle point as average ... 473ohm(AC)

that means we're looking at 473ohm(AC) +/- 23ohm(AC)

and 23/473 = 4.8%

so your later +/-5% variation in rds seems representative of what happens in reality
ie., when Vgs(off) is measured somewhat accurately ... ie., @+/- 5mv

at least that's what my (limited) data suggests
and, again, you're correct ... the ear won't hear any difference on a logarithmic scale of things

basically, what we're really seeking after all is a closely proportional shifting of "all" rds resistances in time
and not so much their absolute values ... when Vgs(off) values are not well matched it becomes easier for some devices to "do nothing" during part of the CV span ... there's no way for most of us to know this other than experiencing a weaker sounding phasor circuit

lastly, as far as rds target values go, it's easy to show that anything below 2k sends the notches way
above anything useful ... so, there's no critical condition the jFET's need to observe at that level ... and if there were, a reduction in Cx capacitor value(s) could easily accommodate devices with higher rds values ... there's actually a ton of room to work with once Vgs(off) is "known" with good accuracy

again, with the idea of playing inside a full available range of notch variation and using OFFSET and DEPTH controls to custom set (desired) operating limits in conjunction with available rds*Cx values ...

[tubegeek]

Thanks for this - interesting build article, it will be a while before I digest it all (and I may go ahead and build it before I get there!)

Two question of clarification please:

• "Phaze" and "Vibrato" are two output node options, correct? So those nodes would go to a switch and then to the output terminal (typically on the bypass switch)? Pretty sure - just checking.

• What is the procedure/purpose for setting the trimpot at the "Vibrato" node? Is that to match apparent levels with the "Phaze" output?

Thanks for the interesting design work. You were ALMOST able to write the whole thing without taking any personal shots at anyone. Mostly the build docs are focused on taking the issue of JFET matching/scaling towards a productive direction, which is good stuff.

[pinkjimiphoton]

hey JC,
any chance you may have a pcb kicking around for this you'd be into selling?
it almost looks vero-able but these days i kinda shy away from that approach on anything complicated.
just plain too hard to see that shiznit!!

nice job, look forward to hearing it when ya post some clips man
peace!

[Eb7+9]

John Snyder of "Electronic Audio Experiments" just confirmed the OSH-Park layout he did for my PARADIGM SHIFTER design ... some of his comments : ".. fixed all pass filter is a cool sound for sure, the options to adjust the depth and freeze the LFO are both huge for me ... this thing is a total phase 90 killer"

Thanks John !!

http://www.electronicaudioexperiments.com/diy/

[pinkjimiphoton]

congrats jc!
i still haven;t had  a chance to populate mine yet, but hope to do so soon!!
i ordered all the parts, but ended up doing a couple runs of fuzzes to pay the bills and now my bench is buried in shit again

[bool]

I would be cool if you could do a version that used common small mosfets a-la 2N7000 as well some day ...

(some wishful thinking here)