CD4049 flip flop question

[Groovenut]

Today I was experimenting with this circuit snippet from R.G.s 4053 bypass article


I accidentally connected like this


The flip flop still functions. Are there any issues with this connection?

Also, if I wanted to guarantee power on state to output high, could I connect a small cap from VCC to pin 5 (my schematic, pin 7 on R.G.s) or if I wanted to guarantee on state to output low connect said small cap from VSS to pin5 (pin 7)?

In my experiments this appears to work fine without any additional current draw or switching irregularities.

[R.G.]

Interesting. I would have thought that it wouldn't operate. Shows what I know. But now that I think about it, there has to be some minimum value for the cap to ground to make it work.

Here's how the first FF works. The 7-6 inverter has an output which is the reverse of its input state (duuh, it's an inverter). The cap to ground eventually pulls up to the output voltage on pin 6 and just sits there. Meanwhile,  the 5-4 inverter inverts the pin 6 logic value and drives pin 7 with that inverted-inverted signal through the around-two-stages feedback resistor, so this reinforces the condition that 7-6 was already in, and the two inverters hold themselves in the state they're in already.

When the pushbutton is pushed, it temporarily connects the cap to the pin-7 input. The cap is charged to the opposite logic state of the pin 7 input, and is a low enough impedance to drag the high impedance pin 7 input along with it. The 5-4 inverter output doesn't like this, particularly, but is separated from the pin 7 input by that 100K resistor, so the cap wins. The 7-6 inverter changes state.

This would be a timing issue, but the cap can't instantly change state because of the resistor in series with it. So pin 6 inverts, which makes the 5-4 inverter change, and reinforce what the cap is telling the pin 7 input to do. The flop has flipped and is now stable in the new state.

Your connection apparently does work, but it does so the hard way. The cap has enough charge stored to temporarily overwhelm the pin 4 OUTPUT, unprotected by a resistor, and forces the pin 11 input AND the pin 4 output to change state at the same time. It's got to be based on how much charge is stored in the cap, and there has to be some value of capacitor below which it will not work.

If it's at all possible, get a resistor after pin 4 and before the connection of pin 11 and the pushbutton. It will be less demanding on the cap, and lower the current pulses you see on the power supply when the cap and pin 4 duke it out.

[Groovenut]

That it works seems to be somewhat load dependent and precariously balanced. I had it driving a totem pole latching relay driver and it worked very consistently driving about 500uA. It's too temperamental to use, IMO, but thought it would be an interesting discussion that it worked at all.

Thanks RG!!

Oh and do you have any suggestions for a way to guarantee power on state?

[anotherjim]

Possible the unrestricted pulse of current from operation will pass down a daisy-chain power supply to make it & any other active pedals pop. The inverter output mosfets have some "on" resistance which you are relying on. Try to find the lowest value to fit in series with the switch so there is some limiting. Maybe 470R to 1k will be ok.

I'd expect the cap to be discharged at power on giving a low output state from 2nd inverter. A reverse diode - anode to switched end of the cap to +supply should ensure this - it would bleed off cap charge (if cap was charged high) into the supply when power goes off as the chip supply volts falls.
Then you have the 1st inverter output always high on power up. If a 3rd inverter is free, you can always add that to output high from the 2nd inverter.

[Groovenut]

R.G.

Is there any reason a 40106 would not sub for the 4049 in this circuit?