TS808 veroboard help

[Dereklyonproductions]

Ahoy
Newbie here. Super n00b. I have completed a handful of BYOC kits and have decided to ruin my relationship with the world and jump headfirst into stripboard layouts.

Straight to the point. I have used 2SC1815 transistors which should be the only change to the design. I have signal, bypassed and with the effect turned on. However I am quite familiar with the TS808 (with a kit under my belt) and I know there is something wrong here.

Initially I had only bypassed signal and a misplaced link to Q2, powering the emitter instead of the collector. This has since been fixed and I have signal at all times, but the Level pot seems to do nothing.

Tone pot will eq the signal, drive pot will add some girth to the weakened signal. Is this a fried transistor? (Readings to come)

I have built myself an audio probe but am unsure of how to use in this application.

I rushed through this build to get an idea of the layout/working with veroboard. It is ugly.

If it is not a fried transistor, I will have to assume a solder bridge somewhere.

Any help/advice would be greatly appreciated.

[Dereklyonproductions]

Readings
Q1
C 9.34
B 2.465
E 1.882

Q2
C 9.34
B 0.00(~.007)
E 1.839

IC (all measurements taken with ground on sleeve of output jack)
1 2.490
2 2.635
3 2.472
4 0
5 2.497
6 2.501
7 2.503
8 9.34

D1
A 2.389
K 2.646

D2
A2.646
K 2.389

[Dereklyonproductions]

[Dereklyonproductions]

[Dereklyonproductions]

I did a Google search and matched the pins on the transistors to veroboard layout.

All help and advice is appreciated.
Happy Canada Day/Independence Day.
Going to see Mick and the Stone's tonight

[PRR]

Welcome.

Nice photos. Nice readings, except--- what exact plan are you working from? BYOC makes way too much stuff for me to find a "TS808", and other TS808 plans number the parts differently. Give us a link?

[idy]

Check Q2. It's base is not biased/shorted or something. If the volume pot is not working, maybe it is ...not connected to where it should be...(4.5 v?)

Also the voltage on pins 1,2,3,5,6,7 should be around 4.5v.  A cheap (low impedence) meter will drag this down a bit when you measure. Your mid voltage, the row where "level 1" is attached should be half the supply.

That layout is a little funny, there's a place where two jumpers go in the same hole,under the IC....
Your transistors are kind of bent over, make sure there is no shorting going on there.

[duck_arse]

also welcome, and your lower right 510k resistor is high one row lower end. it should connect to that cap and the middle pin of the transistor. also - the 51k and the 4k7 left of the diodes is/are low by one row, both ends. the 47nF cap must be one low as well. and the 10k just left of the 51k is one row low.

[Dereklyonproductions]

Oh my goodness.

I have looked at that drawing a hundred times in the last week. Less than 24hours and you've found more mistakes than I can repair.

All I can say is thank you.
It is a Tagboard effects layout, am going to scrap and start over.

I guess one mistake leads to a disaster pretty quickly.

[duck_arse]

there is something to be said for doing your own layouts. there is also something to be said for working with strict laying-out rules - like all 1/4 W resistors are fitted five spot, not 4 to strain the endcaps, not 7 or 9 or 14 so the leads need extending etc. and cap legs are not strectched. and parts can go east-west as well. and no two-wires-in-one-hole.

also, if you mark you copper cuts on the component side with marker pen, fer inst, you get a few more co-ordinates topside. or mark the Vref line w/ orange marker, perhaps. anything you can do before poking the parts in will help cut down on placement errors, rebuilds and swearing.