Sample/Hold based aliaser/tremolo/filter/...

Started by earthtonesaudio, March 11, 2011, 04:27:55 PM

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earthtonesaudio

This is a work in progress.  Some oscillator bleedthrough, but that could be due to the PWM comparator living on the same chip as the audio path.  I plan on making the PWM comparator separate at some point, but I ran out of room on the breadboard.

When you first apply power, U1a's output comes up low and so the oscillators are stopped, U2c goes high and the JFET turns on, putting the thing into a buffered bypass mode.

Toggling S1 enables the effect.

The "carrier" oscillator goes from about 30Hz to above my hearing range, and the low frequency oscillator ("LFO") goes from a fraction of 1Hz up to maybe 20Hz (can't remember).  The pseudo-linear triangle voltage from the input of each of these oscillators is compared by U2c to create a pulse width modulated signal for switching the JFET.  The JFET together with the 100n cap to ground at the input of U2b forms a sample-hold stage.

The sample rate may be set by the "freq" control, and the ratio of sample time to hold time is swept continuously by the LFO (or not, if the "depth" control is turned down).  There is the option of adding back in some of the dry sound with the "blend" control.

When the U1d oscillator is above audio frequencies, the result is a decent tremolo sound with "speed" and "depth" controls.  The "blend" control is a bit redundant in this mode, but it does have a subtle effect on the tone of the tremolo.



I just noticed there probably ought to be a bias resistor (~1M) between the JFET gate and the output of U2a, but it's been working fine without one so far.  YMMV.

Heemis


soggybag

The purpose of S1 is eluding me. I get that it turns on the oscillator. But, I'm not sure why this would be a momentary switch. Seems like you'd want to make this a toggle or leave it out.

PRR

S1 with the cap and Schmitt makes a flip-flop, alternate action.

100nFd seems an awful large sample cap. The "hold" mode is only the loading of TL072, nearly infinite. Unless you want to hold for very long periods (DC), a few pFd should be ample.
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soggybag

Is there anything special about J113 or could any N-Channel JFET working here? What would be a more common equivalent?

Hides-His-Eyes

Quote from: PRR on March 11, 2011, 08:04:30 PM
S1 with the cap and Schmitt makes a flip-flop, alternate action.

100nFd seems an awful large sample cap. The "hold" mode is only the loading of TL072, nearly infinite. Unless you want to hold for very long periods (DC), a few pFd should be ample.

Would it cause an issue though? I use 100nF for everything that isn't value critical because it's easier to keep hundreds of them around.

earthtonesaudio

@Heemis:  I'm in the process of clearing up some hard disk space so I can record some clips.

@soggybag: Paul said it about S1.  J201 is a good amplifier or voltage-controlled resistor, but the J113 is a better switch.  It has a very small VGS(off) differential, making it suited to low supply voltage operation.
If you're really concerned about the part, you could substitute a CMOS analog switch like a CD4066.  It would be better in nearly every way except physical size.

@PRR: The awful large 100n sample cap also functions as an attenuator for clock feedthrough noise.  I tried 10n and 1n caps and got progressively more clock noise as I decreased the value.  I know this is not the most elegant solution, but it does help.

soggybag

Thanks for the reply. I was asking about J113 alternatives because I don't have any of these. But I do have some others like 2N3819, MPF102 and a few others. I wonder if a MOSFET would work here?

Was also wondering why you have a diode between U2c and J113?

earthtonesaudio

All I wanted from the JFET was VGS(off) less than about 3V.  The J113's maximum VGS(off) is 3V, so it (barely) fits the requirement.  The MPF103 and 2N3819 need 8V so they definitely won't work.

The diode is to prevent the JFET gate from becoming forward biased.

It's possible some J113 transistors will not work with a TL074 and a 4.5V bias voltage.  Increasing the bias voltage a bit would help, as would raising the total supply voltage.

earthtonesaudio

http://www.aronnelson.com/gallery/main.php/v/Schematics-etc/earthtonesgallery/My+Song.mp3.html

First two strums are the buffered bypass.  Then knob twiddling, mostly of the sample rate and blend controls.

earthtonesaudio

Here's a better clip.  Guitar into modded Boss XT-2 distortion pedal, then into aliaser.  LFO depth is up full and Blend is set to maximum wet signal.  Just twiddling the LFO speed and sample rate knobs.

The earlier clip was biased wrong and the waveforms got all messed up going into the comparator.  Not sure why it behaved that way.   :icon_confused:
http://www.aronnelson.com/gallery/main.php/v/Schematics-etc/earthtonesgallery/LFOaliaser.mp3.html

isildur100


Mr. Lime

Old but gold, that's one interesting circuit!

Some thoughts how it could be improved a little further:

If I got that circuit right, the comparator puts out some duty cycle modulated square waves. Square waves could be used for logic switches as well and therefore a CMOS switch can be used to replace that JFET.
This might improve the aliasing effect as the resistance of the low pass that is formed with the sampling cap is increased dramatically.

Also different wave shapes of the LFO or even an expression pedal could be beneficial.

Thanks for help

Mr. Lime

I'm having a Parasit Studio Sentient Machine PCB left and thinking about some modifications.

Just like the circuit on the first post, it has a carrier oscillator and a LFO which sweeps.
Instead of tje J113 there are CMOS CD4066 switches which act as variable resistors due to the high frequency of the carrier oscillator.

What if the carrier frequency could be made variable like in the first post and go down to audio frequencies?

Shouldn't we archive some kind of ring modish sound from this or is the cap to ground missing for the aliasing effect?


Thanks for help