LND150 spice model.

Started by POTL, May 14, 2021, 05:56:34 PM

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POTL

Hello everyone I am using Multisim 14 and I want to find a full model LND150 can someone have a ready-made or can suggest how to create a rule?

Ice-9

This is of interest to me as well, a spice model for Multisim or TinaTI would be great. ;)
www.stanleyfx.co.uk

Sanity: doing the same thing over and over again and expecting the same result. Mick Taylor

Please at least have 1 forum post before sending me a PM demanding something.

Rob Strand

Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

Vivek

Here's a great article highlighting the issues when trying to model JFET versus real life measurements:


http://preamp.org/ltspice/adventures-in-spice-real-life-transistor-parameter-variation


I found when working with JFET, there can be quite a large difference between breadboard measurements and SPICE simulations


Ice-9

Quote from: Vivek on May 15, 2021, 08:17:58 AM
Here's a great article highlighting the issues when trying to model JFET versus real life measurements:


http://preamp.org/ltspice/adventures-in-spice-real-life-transistor-parameter-variation


I found when working with JFET, there can be quite a large difference between breadboard measurements and SPICE simulations

Ideed, it is important to take many many real life measurements from multiple parts to create a Spice model.
www.stanleyfx.co.uk

Sanity: doing the same thing over and over again and expecting the same result. Mick Taylor

Please at least have 1 forum post before sending me a PM demanding something.

Rob Strand

#5
QuoteIdeed, it is important to take many many real life measurements from multiple parts to create a Spice model.

There's different forms of reality.

There's a big difference between:

1) models matching JFET datasheet.
    There's a wide range of tolerances in the datasheet
    You would consider a model for typical values but you might consider models
     for the mode extreme cases in the datasheet.

2) models matching the specific parts on your desk.
     This is more a matter of making sure your circuit is doing what you think it is,
     or being able to tweak stuff in spice with the parts you have.

3) models matching the parts from Ebay which are marked 2N5457 but not one of them
    will ever match-up with the 2N5457 datasheet.    The parts don't really have a datasheet
    no-one knows what they really are.

4) models from the manufacturer or web that don't match (1)

5) models from the manufacturer or web that kind of match the datasheet  but not in the region you
    are using them.   A good example is the 2N7000 models they sort of match the datasheet at
    high currents but they never any pedal sims.   The pedals are operating the device at low currents
    and the MOSFET models in general aren't good enough to match the parts at both low and high
    currents.   Here you need to tweak the model to produce a "low current" model.
    [In the next post you can see the Supertex model sort of matches the other model at 2.4mA
    but at different currents they deviate.]

The only legally binding data is the manufacturers datasheet.
Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

Rob Strand

FYI, the Supertex NMOS Model and Ian Hegglun's VDMOS Jul 2019 Model  side by side.

The VDMOS is the clear winner.

There's something funky going on around VD = 0.



http://ww1.microchip.com/downloads/en/DeviceDoc/LND150%20C041114.pdf

Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

Vivek

Quote from: Vivek on May 15, 2021, 08:17:58 AM

I found when working with JFET, there can be quite a large difference between breadboard measurements and SPICE simulations


I should have clarified

I have 10 FET

I gave each one a reference number

Measured Vgsoff and Idss
Calculated beta

Made SPICE model of each individual FET

took measurements of my breadboard and compared with the Spice simulation

Found discrepancies between the two.




POTL


fryingpan

I'm hijacking the thread to ask how one can modify a model of a JFET (for instance) so that it matches any individual device (with its own VGS(off) and IDSS, the measurements you usually take). VGS(off) should be VTO, but there is no specific parameter for IDSS and RD/RS are important, apparently, to model JFETs.

Vivek

You need to calculate Beta

Which is a function of Vgsoff and Idss

There are few earlier posts on this forum on how to calculate Beta


Even then, there can be substantial differences between the model and breadboard measurements


Please read this


http://preamp.org/ltspice/adventures-in-spice-real-life-transistor-parameter-variation

Rob Strand

#11
QuoteI'm hijacking the thread to ask how one can modify a model of a JFET (for instance)
(For JFETs) Spice uses,

Id = BETA·(1+LAMBDA·Vds)·(Vgs-VTO)^2

VTO is the gate cut-off.  It is signed, negative for N-channel JFETS.

Lambda represents the sloped part at higher Vds voltages you see on characteristic plots.

With VTO signed, text books would write,

Id = IDSS (1 - Vgs/ VTO)^2
    = (IDSS/VTO^2) (VTO - Vgs)^2
    = (IDSS/VTO^2) (Vgs-VTO)^2

So Beta = (IDSS/VTO^2)
Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.