Reducing the min delay time on a PT2399-based delay

[niektb]

So I made a EQD Space Spiral clone based on the PedalPCB Dark Rift Delay: https://www.pedalpcb.com/docs/DarkRiftDelay.pdf
But I'm not blown away with the minimum delay... When prototyping I used an atmega controlling the LFO but now I switched to the original hardware LFO. I'm looking now at the schematic and reducing the minimum delay time could be as easy as reducing R20 and R21 to 470 ohms (or even 220 ohms) each. But what I wondered, why have they chosen 1K in the first place? Does it have to do with the required minimum load for the LM324A? Really doubt it as there is already a Depth pot and 22k series resistor but I just wanna make sure

[Mark Hammer]

Perhaps there is a way...perhaps.  But you'd think that after all this time, with so many hobbyists, smart innovative folks here, and commercial developers that have milked the PT2399 every which way they could, SOMEONE would have figured out a way to make it yield delays shorter than the 20-40msec it typically produces.  At the very least, consider what a boon it would be if flanging were feasible with a chip that can be bought for under 50 cents.  So if it hasn't happened yet,my guess is it ain't gonna happen.

[Ripthorn]

You can't simply reduce the resistor there, because the chip will lock up. This is a limitation of the pt2399. There are other less well known chips that do better, like the ES56033, but not in any commercial pedals. I have designed a handful of DIY projects with them. Min delay time is about 14ms compared to the PT2399 min time of about 28 ms. Keep in mind the ES chip is similar, but not pin compatible with the PT and therefore requires a purpose designed circuit. The way to do modulation is also very different, so trying to adapt PT circuits to use the ES requires care and knowledge of how the chip is working. For example, you can't modulate delay time the same way because of the internal compensation circuitry.

[niektb]

Aaah yes, stupid me  forgot about the latch-up 

but the strange thing is that I was able to get shorter delay times when I was prototyping... Even though I had a 2k resistance fixed to ground (in series with a pot and a digitally-controlled FET)... Have I just stumbled across variance across devices?

[anotherjim]

JFET on resistance doesn't go to zero and 2k doesn't cause latchup.
Latchup avoidance requires a trick.
Have you read this...
https://www.electrosmash.com/pt2399-analysis
In my experience, not every PT2399 chip made can work reliably with super-low pin6 resistance even with an anti-latch up delay but every chip I've tried is happy with 1k minimum without any anti-latch circuit. However, delay time with 1k isn't that much shorter than 2k. There is a law of diminishing returns. Essentially, the chips delay line is too long and what a wonderful world it would be if pin5 was a long/short select input instead of the seldom-used VCO output.

You can have modulation that drives the time shorter and longer as it swings, but with the lowest pin6 resistor, it's easier to modulate pin 2. What's more, pin2 already has a bias to mid supply voltage point that matches the swing mid point of most LFO circuits. I don't recommend driving pin2 via a series capacitor - that too can cause latchup. Use a series resistor (it will be large, it's very sensitive).

[ElectricDruid]

When I did a line-of-best-fit with the example delay times given in the datasheet, I got the following equation:

Delay msecs = (28.65 / Current mA) + 29.70

The "29.70" represents the minimum delay time possible (for the particular chip they tested for the datasheet, presumably) and even that would only be possible if the current out of Pin 6 went to infinity.
Say the current was 28.65mA, so we had (28.65/28.65)+29.70 = 30.7 msecs.

Voltage at pin 6 is 2.5V nominal, so that implies (V/I=R) 2.5/0.02865 = 87 ohms resistance. Which is not practical.

According to the equation, the 1K value gives roughly 40msecs of delay. Now, in practice, the PT2399 seems to do slightly better than that, which suggests to me that the assumption made about this being a straight line starts to break down at the extremes (as you might expect).

[frequencycentral]

Has anyone else tried running 2 x PT2399 in parallel, one running just short of its absolute minimum delay time, the other wobbling either side of it? With a bit of dry mix too?

[EBK]

What I want to know is:
What happens if you try to drive an external clock signal into pin 5?  (Yes, I'm aware it is an output pin.)

[Ripthorn]

Has anyone else tried running 2 x PT2399 in parallel, one running just short of its absolute minimum delay time, the other wobbling either side of it? With a bit of dry mix too?

I think I tried it once very briefly, Rick. I'm looking at various flangers, but my super quick and dirty experiment wasn't as fruitful as I hoped, though it doesn't mean it wouldn't work, I just didn't put in the time necessary. maybe I should revisit it, as I am playing with delay/echo chips quite a bit these days...

[anotherjim]

In parallel and no dry, there's a delay before you hear any output. Too much delay to play the guitar comfortably perhaps but would work on synth pad sounds which are usually slow attack anyway.
If you add dry mix, there is a slapback of the pick attack transient from the wet. Again, only slow attack signals really work.

[radio]

If I remember correctly ,there was a thread about changing the voltage for the PT2399.

Thats what they did for "the little angel" at musikdings kit, they used 6V.

https://www.musikding.de/docs/musikding/angel/AngelV2_schem.pdf

A soundsample is there too.

Now even if this is a chorus, it should reduce the fastest repeat in a delay circuit too

[niektb]

okay okay! I understand now that I should include an anti-latchup circuit to avoid crashes. I have read those analyses in the past but I forgot about them  I guess my remaining question is: why did they opt for twice a 1k resistor, one above and one below the pot? or is there no particular reason?

[Rob Strand]

When I did a line-of-best-fit with the example delay times given in the datasheet, I got the following equation:

Delay msecs = (28.65 / Current mA) + 29.70

The "29.70" represents the minimum delay time possible (for the particular chip they tested for the datasheet, presumably) and even that would only be possible if the current out of Pin 6 went to infinity.
Say the current was 28.65mA, so we had (28.65/28.65)+29.70 = 30.7 msecs.

Voltage at pin 6 is 2.5V nominal, so that implies (V/I=R) 2.5/0.02865 = 87 ohms resistance. Which is not practical.

According to the equation, the 1K value gives roughly 40msecs of delay. Now, in practice, the PT2399 seems to do slightly better than that, which suggests to me that the assumption made about this being a straight line starts to break down at the extremes (as you might expect).

FWIW, I did a sightly different fit which incorporated an internal resistance in series with pin 6.

Like you I had,

           Td  = Td0  + k / It

but then I calculated

           It  = Vref / (Rt + Rt0)

where,

      It = actual current out of pin 6,   [mA]
      Td = delay

and constants,

      Vref   internal reference, 2.5V
      k       vco sensitivity to current.
     Td0    some small intrinsic switching time
      Rt0     the effective internal resistance in series with pin 6
         
If we set Rt0 = 0 then we get your equation, except I get Td0 = 29.05, k = 28.93
If we set  Rt0 = 2.5k, then we get    Td0 = 0.13 ms,  k = 28.93
My error criterion was to minimize the rms *percentage* error of Td.

The accuracy of the two forms is virtually identical. 

The main difference in the two forms is the pin 6 current with Rt = 0 can be made a more realistic by setting Rt0.

I'm pretty sure I had a slightly more elaborate version than that where the Vref wasn't fixed.
It had a current dependent Vbe in series with 2.5V.   Something like that, I can't remember if
it was more accurate or not.

FWIW, I can't actually remember what happened to the voltage on pin 6 with you put low valued resistors on there.   I just tried to recreate part of what I did some years ago.

[Andon]

If I remember correctly, there was a thread about changing the voltage for the PT2399.

https://www.diystompboxes.com/smfforum/index.php?topic=86380.0

Yup. See reply #10.

actually, I can answer that. I tried that a couple years ago and according to my notes

with pin 6 grounded,
5V supply = 24ms
6V            = 18ms
6.5V         = 16.5ms
7V            = 15ms
7.5V         = 14ms
8.5V         = dead chip

also current draw nearly doubles from 28mA @ 5V to 58mA @ 6.5V

hope that helps

EDIT: Decided to quote the relevant post to save a few clicks for those looking.

[ElectricDruid]

Thanks Andon

actually, I can answer that. I tried that a couple years ago and according to my notes

with pin 6 grounded,
5V supply = 24ms
6V            = 18ms
6.5V         = 16.5ms
7V            = 15ms
7.5V         = 14ms
8.5V         = dead chip

also current draw nearly doubles from 28mA @ 5V to 58mA @ 6.5V

hope that helps

Seems like a lot of juice and a fair bit of risk to lose only another 10msecs. Although I suppose that in terms of chorus, the difference betwen 24msecs/5V and 16msecs/6.5V is significant, so maybe it's worth pushing it just a bit. Still, we've got BBDs for that, right? (ok, maybe not *at the moment*!)

[Ripthorn]

okay okay! I understand now that I should include an anti-latchup circuit to avoid crashes. I have read those analyses in the past but I forgot about them  I guess my remaining question is: why did they opt for twice a 1k resistor, one above and one below the pot? or is there no particular reason?

Splitting the resistance is necessary if you are modulating pin 6. Connecting the lfo directly to the pin can result in no delay, and you don't want to connect the lfo output to be connected to ground. I learned both of these lessons on the breadboard

[Mark Hammer]

I repeat, given the number of full-time professional engineers at it, and the number of manufacturers who could really stand to cut production costs by getting a PT2399 to do other tricks, you'd think someone would have opened up a chorus or flanger and seen a PT2399 in there by now instead of a BBD.  So unless someone here is holding out on us, I suspect this mission may go the way of cold fusion - interesting in theory, but ultimately so impractical and complicated as to be unfeasible.

[Andon]

EQD managed to do it with their Sea Machine, but I digress, we're talking about delay in here.

[anotherjim]

I still need to find the reason for some of the names given for those delay pedals. I've never heard a PT2399 do anything remotely aquatic.

[niektb]

okay okay! I understand now that I should include an anti-latchup circuit to avoid crashes. I have read those analyses in the past but I forgot about them  I guess my remaining question is: why did they opt for twice a 1k resistor, one above and one below the pot? or is there no particular reason?

Splitting the resistance is necessary if you are modulating pin 6. Connecting the lfo directly to the pin can result in no delay, and you don't want to connect the lfo output to be connected to ground. I learned both of these lessons on the breadboard

But there already is a 22k resistor in series with the LFO output, so shorting to ground or pin 6 should not be a problem right?

I repeat, given the number of full-time professional engineers at it, and the number of manufacturers who could really stand to cut production costs by getting a PT2399 to do other tricks, you'd think someone would have opened up a chorus or flanger and seen a PT2399 in there by now instead of a BBD.  So unless someone here is holding out on us, I suspect this mission may go the way of cold fusion - interesting in theory, but ultimately so impractical and complicated as to be unfeasible.

Right! But I'm not after flanging! Right now I have about 50ms min delay time which I find a bit much... I think it might be even more than that.
I hope to get it just slightly in the territory where I can no longer distinguish the individual repeats, where it starts to get a doubling effect (which I know is easily possible). I kind of expected it to be already capable of that but maybe my individual unit is a bit on the loose side of the specs.
But I want to do so without breaking the LFO or anything