Why are matched JFET's in phaser important?

[skiraly017]

Sorry if this seems like a ridiculous question. Thanks for any help and information.

[Sir H C]

So that they all work the same.  If the values are way off you can not get all the stages to phase with the same bias voltage applied. 

[R.G.]

So that they all work the same.  If the values are way off you can not get all the stages to phase with the same bias voltage applied.

Correct!

Thanks for any help and information.

One way to think of it is that a JFET can have a channel resistance (i.e. resistance from drain to source) from rds(on) of 10 to a couple of K ohms depending on the JFET up to off, which is many megohms. It goes through that few-ohms-to-many-megohms range with a voltage from gate to source that starts at Vgsoff and ends at Vgs=0V. The pesky JFETs all have different Vgsoff values, though. If you don't select matching devices, one of them may have gone from off to under 1K before the others have even started conducting.

If that's the case, the phase stages don't move in synchronism, it's one or more at a time. You get the most phasing if they all move relatively at the same time. It doesn't have to be perfect, but it helps the sound if all the phase stages have phase resistances that are close together.

For more info on why phase stages moving in synchronism might be important, read "The Technology of Phasers and Flangers" at GEO and the other articles on JFET matching at GEO.

[Mark Hammer]

The phase shift produced in each stage become maximal (90 degrees shift in that stage) at a frequency determined by by the joint value of the cap and FET to ground.  The phase shift produced at that frequency is summed across all stages so that if there is 90 degrees shift at 450hz in each stage, then you end up with 360 degrees shift over 4 stages.

When one or more of the FETs is unmatched, the combined sweep of the sections starts to be like Olympic rowers where one or more of the rowers does not complete the full oar stroke in synchrony with their teammates, but gives up part way through the stroke to wipe his/her forehead before resuming and joining their teammates on what is left of the back/return stroke.  Obviously under those conditions, the boat will not move forward smoothly or with maximum efficiency.  Consequently, as RG notes, it is important that all the variable resistors in the phase shift stages keep "moving" at the same time, with none of them giving up at any point.

What you are matching them for, however, is not their specific resistance, but their equal susceptibility to having their resistance change.  As was pointed out to me by Mike Irwin, this is why, despite it being so hard to match even a pair of LDRs, a unit like the Mutron Bi-Phase can sound so good with a dozen of them: because LDRs don't crap out mid-sweep.  Even though they won't have the identical resistance or produce he maximum phase shift at the exact same frequency when the cap value is taken into account, they will continue to sweep as long as the LFO is telling them to do so.  Because the phase shift is summed across stages, the pleasing quality comes from the continuus and equal/smooth movement across the frequency spectrum by the phase shift stages, not their alignment at some point in frequency spectrum.

[A.S.P.]

The phase shift produced in each stage become maximal (90 degrees shift in that stage) at a frequency determined by by the joint value of the cap and FET to ground.

how about 180° ?


(reference,  fig.13).

[R.G.]

how about 180° ?

The phase shift from a single stage is asymptotic to 180 degrees - it gets ever closer to it, but never quite gets there.

That's why phase stages are always an even number - it takes two to actually GET to 180 degrees to make a notch. Identically matched perfect phase stages do this at a shift of 90 degrees per stage. Mismatched stages may do it with 179 degrees from one and 1 degree from the next, but a single stage never gets there.

[tasco]

Hi every one, my first post here, i've reading a long time just reading.

Now my question is: can i use the FET's that come in cd4007 ??

would the sound change so much??

[Eb7+9]

Sorry if this seems like a ridiculous question. Thanks for any help and information.

not silly question at all - there's obviously lots of misinformation and misunderstanding about this ...

It's important to realize first of all that all-pass stages use jFET's in a zero-current situation (the cap is blocking DC) and that testing devices outside this area of operation and infering match in the other area is a mathematically unjustified leap of faith ... however abstract this may seem, it comes down to the fact that the specs we're looking to match correspond to the first derivative of the specs being measured in "absolute value" testing ... there is a direct "mathematical" translation in the Bipolar case while in the jFET case it does not hold because of a second device specific variable ... VgsOFF

this all-pass application case is even more extreme in a sense of matching rellevant specs, since it refers to operation at and around the origin (Vds=0, Id=0) in the device transfer plot - same goes for the other side in quadrant 3 for incrementally negative Vds and Id values ... to add even more confusion to the picture that resistance is piece-wise linear around the origin and then starts getting curvy about 0.1v away from the origin on both sides - but that non-linearity is treated as a side issue when addressing gross resistance matching ... we have to ignore that here or the discussion gets too complicated to argue anything ...

generally, there are two "first order" matching specs that apply to jFET's - even more so when used as Zero-DC-Current Resistance ... in this case we're interested in : the turn-off voltage VgsOFF, and the response of the resistance-to-voltage (or slopes-to-voltage) once you're on the so-called "on" side of the so-called turn-off point ... the turn-off point is an arbitrarily set figure that you'll find in data sheets - for 2n5457 it's given as the Vgs voltage required to bring Drain current down to 10nA @ Vds=15v ... in reality there's no fixed cut-off point - it almost acts like it - so it has to be standardized this way ... the sata sheet shows that VgsOFF can vary between -0.5v to -6v for the 2n5457 ... that's a large variation, esp if the testing is done in "lumped" test performed in a low Drain voltage situation ...

unlike Bipolar transistors and diodes which can be fairly well matched along transfer curves using only one test point (this determines the scaling factor), jFET's have two degrees of spec variability ... the conduction channel area variation is the dominant factor in providing spec changes from one device and another of the same type in diodes and bipolar transistors (aside from VTh which is temp sensitive and assumed universal to all devices), while for jFET's the VgsOFF spec is a second and isn't universally applicable like VTh for bipolars is ... channel area variation translates into a scalar term, which scales the Drain current, while VgsOFF is imbeded in the 3/2 power Drain current function - same way Vth is embeded in the exponential Collector current function for bipolar devices ... only difference is VgsOFF is device dependent while Vth isn't unless the circuitry gets hot in different places, etc ... in our low power situation this distinction applies !

so, there's is no one single test that will match for both parameters in jFETs ... the test that RG appropriated for his tech page is a well known test for matching devices at fairly high non-zero drain current operating points - typically this test is done after devices have been isolated in different VgsOFF spec groups ... if you read through some of the phase45 posts you'll notice that some people are not getting reliable results using that approach - this is the reason why ... if they DO happen to get good match it's because VgsOFF specs are already similar enough ...

more to the point, the jFET used as a resistor in an all-pass circuit is operating under zero DC drain current - so a test to match devices at high non-zero current very likely won't do much for you in matching zero bias channel resistance specs ... remember matching resistance is in fact matching the "derivative" of the transfer function at that point - it's not an absolute value match, and unlike Bipolar devices where the derivative of the transfer function itself (an exponential function) is the function itself times a scalar (the exponential function again) the jFET don't carry this property as a luxury, which is why matching jFET's is slightly canny buziness ...

FIRST you need to isolate devices with close VgsOFF specs - this will determine if they all turn on or off together near the same bias point ... THEN, if you want, you match them for similar resistance channel response to Gate bias variation ...

the reason why I say, if you want, is because - as Mark said correctly - what matters here is the RC product between the phase cap and the incremental resistance of the FET channel around the origin bias point - together their product sets the bandwidth and cutoff frequencies of the phasor stages ...

there is no rule that says matched stages sound better than staggered or whatever - they both produce somewhat different filter sound - it's a matter of taste ... if you want to get a Univibe like filter sound like I described for the Small-Stone and other jFET phasors - one way is to get jFET devices that have matched channel resistance (succeeding a matching of the turn-off specs) and then choose your caps in the proper ratios ... otherwise you could use matched capacitors and rely on proportionately varying channel resistances to get the same series of ratios in each cap-FET pair ... of course you could go random and get lucky (!)

so, we ask ourselves at some point which one of these two non-random approaches would be more reliable for nailing a certain sound ?!

as I've suggested in my Phase45 notes, I recommend testing the devices one at a time within the phasor itself, ie by applying varying bias and listening to where the devices turns on (that's a direct indication of VgsOFF specs right there) and then to see how far the sweep goes past that point (an indication of how "fast/slow" zero-current channel resistance varies with bias sweep) - choose your devices that have similar sweep range following the common turn-on spot and you're done ... that way the devices are being tested in the mode they'll be operating in - so there's no more question about it !

as an aside ... all this suggests that your jFET's are never going to be perfectly matched and so one should always expect their phasor to sound subtely different than their buddy's to a degree even if they go through the same matching technique ... that's the 'sensitivity" side of analogue circuitry fo ya ...

~JC

[R.G.]

there's obviously lots of misinformation and misunderstanding about this ...

There certainly is.

all-pass stages use jFET's in a zero-current situation (the cap is blocking DC)

That is incorrect. They are used in a situation where the signal currents are balanced around zero volts DC. The currents are not and cannot be zero, or there would be no circuit function. The JFETs experience small currents balanced around zero current, or a low current AC situation.

testing devices outside this area of operation and infering match in the other area is a mathematically unjustified leap of faith ...

It may be mathematically unjustified in the sense that no one has ever worked out from first principles the mathematical proof that it's OK to match them with DC. However, the practical experience is that DC offset matching works very well indeed. Many thousands of pedals have been produced and function well with JFETs matched with techniques similar to the DC matching one. So Mother Nature must be allowing it to be a close enough answer if not the perfect answer - eh?

this all-pass application case is even more extreme in a sense of matching rellevant ...operation at and around the origin (Vds=0, Id=0) in the device transfer plot...quadrant 3... incrementally negative Vds and Id values ... even more confusion... piece-wise linear... non-linearity...gross resistance matching ... we have to ignore that here..."first order" matching ...VgsOFF...resistance-to-voltage ... the turn-off point is an arbitrarily set figure...no fixed cut-off point...large variation...Bipolar transistors...transfer curves... one test point ...jFET's have two degrees of spec variability ... the conduction channel area variation...VgsOFF spec... isn't universally applicable... channel area variation... VgsOFF is imbeded in the 3/2 power Drain current function...circuitry gets hot in different places, etc ... in our low power situation this distinction applies !

And this goes on and on and on.

Let me help with translating this into English. I think that what JC is trying to say is that it isn't strictly correct to rely on matching JFETs on the basis of one point of conduction as in the JFET matching setup on my web page. He believes this is because JFETs vary too much and in too complicated a way, so even if two of them are "matched" at a single point, they will be different sounding because there are many more matching points and different things to measure to try to get them truly matched. Which is all moderately true, and has been beaten to death here at least a couple of times. Along the way of trying to explain why a single point JFET matching test is inadequate - and he points at mine in particular - he loses sight of the reason that matching is important, which was the original question.

And that is just what the first reply said:

So that they all work the same.  If the values are way off you can not get all the stages to phase with the same bias voltage applied.

JC's recommendation:

I recommend testing the devices one at a time within the phasor itself, ie by applying varying bias and listening to where the devices turns on (that's a direct indication of VgsOFF specs right there) and then to see how far the sweep goes past that point (an indication of how "fast/slow" zero-current channel resistance varies with bias sweep) - choose your devices that have similar sweep range following the common turn-on spot and you're done ... that way the devices are being tested in the mode they'll be operating in - so there's no more question about it !

And that is indeed a great way to do it. There are a couple of problems with this approach, though. So let's play a little hypothetical math.

What are the chances that two JFETs have the same identical cutin point? The correct answer is zero, but the differences get too small to squint, especially when we're just easter-egging devices in sockets and trusting our ears to remember what we heard last time. The problem then gets devolved down to how small a difference can we hear for a cutin point and how consistent our minds - not our meters! - are at picking out a cutin point. I'm going to flatly guess that the ear by itself, no measurment, can't get closer than 5%. That amounts to buckets of 5% variation, and that's a one in 20 variation if the variation is uniformly distributed. Of course, the variation may not be uniform, but if you already got lucky with tight JFETs, you're wasting your time trying to match. So let's say that they're one in 20, another way of saying that in every 20 devices you test, you'll find two that are "close enough".

So now we are also going to easter egg for sweep range, which we presume is independent. Any guesses as to the chances that two random JFETs have the same Vgs range for resistance sweep? I know this one, because I did the sampling work. My JFET matching technique measures this directly (albeit with DC signals, not AC signals, you purists will want to note!). I find "close enough" pairs about every 15-20 devices. So let's just call it one in 20 to make the mental math easier.

The process is - stick a device in the socket. Vary the bias, noting mentally where it cuts in and how big the range is. Then you are going to pick up another device and substitute it into the socket, diddling the bias and remembering where that new one cuts in and how wide ITs range is. How many devices do you have to test to get a 50% chance of having an acceptable match? It's a one in 20 chance of a cutin match, remember, and a one in 15-20 chance of a range match. That's one in 300-400 of the second random JFET being an acceptable two-parameter match to the first one. So you gotta do that little dance 300-400 times: remove the old device, find one that you haven't already tested (you DID remember to mark them all differently , didn't you??), plug it in, diddle the bias listening for cutin, diddle again for range, and deciding whether that was a good pair.

Here's where it gets sticky. If you do it this way, you don't have to just remember the first device and the one you're doing now, you have to try all possible combinations to get a match. So that gets to being 300 factorial: 300*299*298*297*296*...*2 and that number is huge. You won't live that long. So I suggest no one has ever or will ever do that kind of ear test as suggested.

You can shorten this up a big if you are actually measuring and writing down the bias voltage where each JFET cuts in and out. So you stick your meter on the bias voltage and listen for cutin and cut out, writing down both numbers for each device. The meter is presumably more accurate than your hearing of the cutin point, so the resolution is limited only by your ear. Having written down the numbers, you can now look not for a match to whatever device you happen to put in first, but for any two devices having similar numbers. This is incredibly important because it increases the chance of finding a match hugely. Now you don't have to match the first (or any succeeding device) by ear, you only have to find out if ANY two JFETs have a similar parameter. And you can "listen" to them all at the same time. So you only do two tests on every device, not 300 factorial tests.

The problem here, of course, is that you're actually listening for the cutin and cut-out points and the human ear is a notoriously inaccurate device formeasuring such things.  If you're going to all the trouble of doing a two-parameter matching test, do it with something that doesn't get tired or confused about what it's listening to. Set up the JFET so you can measure small (under 100mv) AC signals in a voltage-divider setup, and so you can actually measure clear cut-in and cut out points. A simple setup would be a 600Hz oscillator producing a 100mVAC signal, and running into a 100K resistor in series with the JFET under test to ground. You vary the reverse voltage on the gate to grounded source and record the bias voltage where you get 50mV of signal across the JFET (that is, where the JFET Rds is 100K) and the place where the signal across the JFET is 5mv (that is, the JFET Rds is 5.2K) for each JFET. Then once you've measured all of your JFETs, you have Excell or Word sort a table of the values into order and start picking pairs, quads, hexes, or octets. The difference is that there's only one pass, you're not playing statistics, and the meters don't get tired, even though you might.

Notice that what you're actually measuring with this test is the small signal AC resistance, which ideal purity says must be what is important in a phase shift circuit.

While this test is OK, it tells you NOTHING about the RATE of variation of Rds as you move the bias, which JC correctly points out is also variable. So what you COULD do is to redo this test, but instead of measuring only the 100K resistance point and the 5.2K resistance point, you measure the bias at 100K, 90K, 80K,... 10K, 5K, 1K, etc. Then you can make an actual Vgs versus Rds plot for every JFET and get really, really good matched JFETs. If, that is, you have two JFETs that in fact match that closely.

In all probability, you will not. The raw statistics say that you're only going to get good curve-matches for a few out of every hundred devices, so the testing gets long (even done the smart way) and you have lots of little plastic pills that are left over that don't match each other. There is nothing wrong with this, but it is not cheap, easy, or fast.

So - you're left with the choice of imperfect tests. You can quickly and easily get a fairly close sounding set with a DC Rds test with the GEO matcher. Lots of people have used this, and like the results. But that's not perfect. You can also buy a large bag of JFETs and spend some time easter-egging in JFETs in sockets to see if that one ... no, the last one... no, wait, number 57... yeah... wait.. that's closer... sounds good to your ear; this is a good and valid way to spend your time if you like easter egging. Or you can rig up complicated test setups to do multiple point matches; I can sketch up the gear, it's not hard IN CONCEPT.

And that's why I - appropriated, was it? the DC rds tester. It gets a helluva bang for the buck, imperfect as it may be.

And, lest we forget, the reason matched JFETs are important in phasers is that

So that they all work the same.  If the values are way off you can not get all the stages to phase with the same bias voltage applied.

[gez]

Now my question is: can i use the FET's that come in cd4007 ??

would the sound change so much??

Not sure if this has been answered as the posts are too long for me to read through (I'm not being sarcastic, I just don't have the concentration these days).

Anyway:

http://www.diystompboxes.com/smfforum/index.php?topic=26740.0

[Mark Hammer]

What I'm getting from the more articulate postings here is that if one wants to build a "classic" 4-stager, then using FETs is reasonable, and although they may never be perfectly matched, the simplicity of the circuit will make the imperfect matching less of an issue.  If one wants to aim for more than 4 stages, though, perhaps LDRs or OTAs is the more practical path to pursue.

[bioroids]

How well matched are the Mosfets on a 4049/69 for this particular application?

Luck

Miguel

[R.G.]

All CMOS logic chips are monolithic, fabricated at the same time on a single chip. They are very well matched indeed.