comments on this phaser

[myrick13]

good day to all of you..
i would like to ask some questions regarding this phaser that i have found from my archives.
1. do i still need matched jfet to make this one work?
2. if i remove the electronic switch where should i cut?
thank you

[Mark Hammer]

1) Yes.  FET-matching, or rather FET-selection, is to insure that all the FETs sweep together, without ever hitting a point where one or two of them stop being swept and only the remaining ones are varying in resistance.  Stage choreography looks crappy when a couple of the dancers just stand there while the others are moving in synchrony.  Phasers are more or less the same in that respect.  They just lose their zip unless all swept elements move together.

2) Q6 and D3 tied to its gate can be removed, and everything leading up to D3 can go also.  R22 can also be safely eliminated, with C11 tied directly to R25.  C12 can actually go directly to pin 8 of IC1c, just like C11.  That way C11 blocks DC in the final phase-shift path, and C12 will decouple the regen path from everything else.  R25 will benefit from being replaced with a 15k fixed resistor and 50k-100k pot wired as variable resistor.  This will allow you to perfectly match wet and dry in a 5050 balance as well as dial in subtler sounds where the phase effect recedes a bit into the background.

Never used J202 FETs ina phaser before.  Don't know how they will work.  Could be good, could be limited in sweep.  Let your ears decide.  Given how generic everything else is about this design, though, you may want to install sockets for the FETs (Q2 through Q5) so that you can experiment.

4741 quad op-amps can probably be successfully replaced with lower-noise chips like TL074.

[nordine]

thats, more or less, a MXR phase 90

check it out at www.tonepad.com ...you'll got the layout, and a verified (and, i think, simpler)schematic

[myrick13]

thanks mark, may be i will build a phase 45 first because it has lessed components.
another question is that can i used 2sk30a on phase 45?
thanks

[Mark Hammer]

2SK30A as phaser FET?  You would not be the first to do so.  I've seen a number of circuits that used them.  Not a lot, but they are out there.

We talk a lot about FET matching here, but the discussion never really seems to come around to what constitutes a "suitable" value for any resistor in parallel with the FET.

The FET-to-ground, regardless of whichever FET you select, forms a highpass filter in combination with the cap it joins with at the op-amp input.  Ideally, ALL the FETs in use are matched so that any voltage change coming from the LFO makes ALL the FETs change their resistance simultaneously.  I.E., if you have 4 stages, you will always have 4 FETs changing their resistance, not one "stuck" and 3 others changing. 

But what exactly IS that resistance?  Imagine that the FET resistance never goes below 10k.  In combination with the .01uf caps shown, that would mean that no notches would ever appear below around 1600hz at the lowest.  You could certainly hear that, but it would also mean that much of the time the notches will be higher than that and largely inaudible.  Great phasing...for a dog.

For that reason, you'll find that many FET-based phasers - including this one - use parallel resistors to set an upper limit on what/where the notches will be.  With 100k resistors to ground, the FET resistance is placed in parallel with the fixed resistors, and the user/builder can know that no matter how high the FET resistance gets, the combined resistance will never be higher than 100k.  Incidentally, higher resistances to ground mean the notch is lower.  In this instance, we can be assured that no matter how high the FET resistance is, the notches will never descend below around 160hz.

While having those fixed resistors provides some assurances about the nature of the sweep at the low end, what about the high end?  If the FETs you use are pushed to the point of having an effective resistance of 1k, in parallel with 100k that makes an effective combined resistance of 990R, which would mean the notches begin around 16khz.  Now, even the dogs are probably missing out, and only the bats are snapping their, um, "fingers".

So what can you do?  Certainly the place you start is in matching the FETs.  Once matched, the next logical step is to measure their resistance at peaks and troughs of the LFO sweep cycle.  Once you know that, there are two strategies you can adopt, either one at a time or in combination. 

One strategy is to alter the parallel resistor to achieve a reasonable sweep range.  Here, I'm going to wave my hands like a madman and suggest - out of thin air - that you may not want to exceed a 10:1 or maybe a 12:1 combined resistance change.  So, if the resistance change in the FET/R combo reaches a maximum resistance that is 12x whatever the minimum resistance is, then you will know that if the lowest notches occur at , say, 200hz by your calculations, the highest they will start at is 2400hz.  (I say "Start at" because the notches occur at multiples of the base frequency, depending on the number of stages you use.  For a 2-stager, "start" and "end" are the same thing.  For a 12-stager, they will be farther apart.).

The other strategy is to play around with the cap values.  So, if you knew that the resistance range covered by the R+FET, as driven by the LFO, went from 75k down to 2k, with a .01uf cap that would mean notches starting at just under 8khz and going down as far as 210hz or so (rounding off).  If you switched to a .015uf cap instead, then the range would be from around 5300hz down to around 140hz, which is a little more usable.

As noted, you can use parallel fixed resistor and cap changes in tandem.  Let's drop the maximum resistance down a bit by decreasing the parallel resistor value.  So now we have a resistance range of from 2k up to, say, 50k.  Our sweep now goes from 5300hz down to 212hz, which is a little better than having 140hz as our lower boundary.

The bottom line of the lengthy discussion is that you can feel free to change to any of a variety of other matched FETs.  The pleasingness of the sweep achieved may vary due to the linear resistance range of the FETs selected.  The good news is that the sweep range can be custom tailored by using a little bit of math and selecting parallel resistor and cap values to achieve a sweep range that does not go down too low or up too high.  The math is the classic Freq = 1/(2*pi*R*C) for calculating notch frequency, and 1/R = 1/Ra + 1/Rb for calculating R+Fet parallel resistance.

[myrick13]

i have succesfully constructed the phase 45 using j202 fets
thanks a lot mark for your help