Matching J201's

[Sody54]

Happy Saturday!

I've been working on a Phase90 on vero the last couple weeks and I'm this close -->| |<-- to getting it working right!  I used Hilbi's layout http://aronnelson.com/gallery/Grooveyard/mxr_phase_90 .  I posted a question last week while the temp server was running, asking about the zener and JFETS.  I THINK I've got those right now.  I dound a 5.1V zener at bombshack and built the "Improved JFET Matcher" from Geo to match up my J201's.  I'm not sure if I'm matching them correctly though. 

I had about fifteen 201's to pick from and after testing them with the matcher I had very similar Vgs on them.  I set my DMM to 20v and got 4 distinct groups at .69, .72, .74, and .86.  This didn't seem right to me, so I bumped down to the 2V setting and took the .86 group ( I had 7 at this reading) and ran them again.  All were either reading  .851 or .845.  Any ideas what I'm doing wrong??  I double and triple checked the matcher circuit and I'm 100% sure it's correct.

I'm assuming the unmatched 201's are what's causing my circuit not to phase.  It will phase while turning the trim pot, but not on it's own.

Any input would be gratefully accepted.  I'll do some more searching in the forums in the meantime!

Thanks

[petemoore]

I double and triple checked the matcher circuit and I'm 100% sure it's correct.
  I did that too while building a second, then a third one...finally found my mistakes on the third one.
  just for kicks [and eliminating variables] I made the opamp bias and '>/~' unity level known as 'good.
  J201's can make the circuit work, IIRC, 2n5459?.. [see parts list / availability].
  There's a way to test if the LFO is operational, IIRC there is a trace on the LFO circuit which will have a voltage which moves up/down...right where it goes to control the Jfets.
 

[mdh]

Looking at that layout and a J201 data sheet, it looks like the pinout is opposite of what is indicated on the layout.  So if you didn't check that yourself, the first thing would be to try flipping the FETs around.  According to the Fairchild data sheet, the pinout should be DSG with the flat side facing you and the pins down.  In my experience, that circuit should definitely phase with those FETs, though you may get more satisfying results with a higer Vgs_off.

Good luck!

[petemoore]

  oh yes pinout.
  you could parallel another pin to the 3 pin Jfet test socket.
  I forget the assignment...
  basically you add an extra pin to the 3 pin Jfet test socket, this way transistors with all pinout types can be tested in the fixture without having to bend the legs around on each transistor which doesn't match pinout.
  This would probably be something like adding another drain lug to the fixture socket, making the fet in test face the opposite way.

[mdh]

It's also quite possible that he's testing them in the matcher with the correct pinout, just plugging them into the vero the wrong way around.  IIRC, the oddball pinout of the 2N5952 has caused some confusion with the Tonepad Phase 90 layout.  I'm too lazy to look, though