Tremulus Lune Analysis

[scanlory]

I'm working on analyzing the LFO stage in the Tremulus Lune, http://www.tonepad.com/project.asp?id=42, and I was wondering if anyone could help me derive the gain expression (from the non-inverting terminal of IC2 after the spacing control to the input of the buffer stage of IC2).  I'm having a little trouble understanding how the smoothness control changes the output of the LFO from a sine to square wave as well.  Any help would be great.

TIA. 

[George Giblet]

There's no real "gain" as such it's more to do with voltage swing.

The output of IC2 pin 7 is a square wave swings at roughly 1V to 7.5V or so.

The voltage on IC2 pin 5 is approximately square wave because it is basically the pin 7 voltage divided down by the 220k "feedback" resistor.   The 500k smoothness pot does leak some filtered square wave back to pin 5 which complicates things.

The voltage swing on pin 5 is roughly the IC2 pin 7 output divided down with a divider R1=220k, and R2 = 470k in parallel with 220+250k (spacing mid position) so R2 is about 470k/2 = 235k. A pin 78 swing of 6.5V (=7.5 - 1) will produce a square wave with a  3.3V swing.

The circuit filters the square-wave with the series R's on pin 7 and the 100uF cap.  The voltage on pin 5 of IC2 sets the threshold for the Schmitt-trigger so despite any complications regarding the smoothness pot the peak to peak triangular voltage on the 100uF cap tends to be about the same as the peak to peak square-wave on pin 5.

[scanlory]

Thanks for the response!

In a typical Schmitt-trigger oscillator (at least what i have read about), the capacitor that is connected to the non-inverting input is usually grounded as well:



How does the 0.01uF cap that connects the output of IC2 to the non-inverting terminal effect the circuit? (In the above configuration, the output swings about 0V, but not in the Tremulus Lune configuration?)   From what I can tell, when the voltage at pin 6 reaches the threshold of the trigger, the output is driven high, thus discharging the capacitor.  Is this kind of on the right track of thinking, or is that completely wrong? (Sorry, my knowledge of oscillators is fairly limited).

[George Giblet]

> How does the 0.01uF cap that connects the output of IC2 to the non-inverting terminal effect the circuit?

In the termulus lune the timing cap "C" does actually go to ground - it's the 100uF cap.

You are on the right track but it's the wrong cap.  The 0.01uF cap has minimal effect on timing.

Using your circuit:  Suppose the output was low then just went high.  The voltage on the cap C will be at it's lowest voltage, the voltage on pin 3 will be at it's highest voltage.  Because the opamp output is high the cap C starts to charge through R.  When it finally reaches the voltage set on pin 3, the positive threshold, the output swings low and the voltage on pin 3 is pull to the low value.

Once in this state pin 3 is at a low threshold, the output is low, and the cap is discharging towards the low threshold.

[scanlory]

Thanks for the help, I think I kind of have an idea of what is happening.  I also did a SPICE analysis of the output of the LFO, and that helped me visualize how it works.