Possible JFET Biasing technique?????

[MicFarlow77]

Hi all,

At the risk of opening a can of worms, I was wondering about the below arrangement for biasing a jfet:



The article that accompanies this:

http://electronicdesign.com/Articles/Index.cfm?AD=1&ArticleID=20024

What does this do or (or not do) for gain, noise, clipping and the ability to get the much desired consistency out of our beloved J201's...

BTW, I have no idea if this is a good idea... way over my head... I just found this and thought I'd bring it to the forum for comment. The article does not mention the applicability of this to the low frequency type stuff we are doing, but I thought it might be something worth pursuing regardless.... I'm dumb enough to try it anyway 

Being as I have a bag of 1N4148's (Thanks John!!!!) and more than a few J201's, I will be breadboarding this up tonight and playing with it..... well, maybe.. I just checked and I don't have any 1G resistors... will try it with some 10M in any event.... might be enough to experiment with.... might not be either..... w00t w00t....

Thanks,

Mick

[alanlan]

I've played with ideas like this before, in fact, you can make an amplifier using just diodes and no resistors by placing say one diode in the source and 4 or 5 in the drain.  Interesting but not practically of much value.

It's not really a great idea though because it assumes that you want the bias to be at around -0.6V which probably won't be what you require for a given device.  There are much better ways of biasing FETs - do a search on here as it has been discussed many times before.  I think the article is biased towards higher frequency pulse amplifiers (whatever they are used for I have no idea!).

[R.G.]

There are problems.

The distinguishing feature of a diode used this way is that it has a forward voltage which is approximately constant whateve the current that flows through it. The JFET is then fixed-biased at 0.6V negative on the gate with respect to the source. A J201 has a cutoff voltage which varies from -0.3 to -1.5V, so some J201s biased this way will be completely turned off, and some will be solidly turned on. No way to tell.

The advantage of using a resistor is that a resistor gives some feedback and hunts for a position where the device is conducting something.

Diodes don't hunt. 

Other JFETs may have Vgsoff of -3 to-6 or even  bigger, so they may not even perceptibly be lowered from Idss by the diode bias at all.

[Rob Strand]

A more general answer is fixed bias is generally poorer for JFETs.  The diode is more like fixed bias.

As far as gain goes, for the same voltage drop, the diode has a lower dynamic resistance than a straight source resistor - so you will get more gain withe diode.  However if you bypass the source resistor with a large cap the cap will ensure you get maximal gain (a tad more than the diode).

[brett]

Diodes don't hunt.

Brilliant analogy.

Does anyone know of a java calculator for estimating bias in a common source JFET stage?  I suppose it isn't simple because each JFET has its characteristic correlation between Vcutoff, gm and Idss. 

On the other hand, datasheets show that Id falls almost linearly from Idss to 0 as Vgs goes from from 0 to Vcutoff.  The slope of the relationship is similar for any member of a type of JFET (e.g. 2N5457, J201).  Therefore, Vcutoff predicts Idss (and vice versa).  Idss or Vcutoff can then predict Id at any value of Vgs. 

For example, for a J201 the Id:Vg relationship is approx 6mA Id per volt of Vgs. A J201 with Vcutoff of 2V therefore has Idss of about 12mA.  At 1 V the Id is about 4mA.  Likewise, a J201 with Vcutoff of 3V has an Idss of about 18mA.  At 1V the Id is about 12mA.  These assumptions are rough as guts, but we're not doing rocket science.

With assumptions such as these a speadsheet could iteratively optimise the value of resistors to place around a particular JFET.

cheers     

[Gus]

Brett

    In your post is a reason I do the first sort of the same brand and number FET with a IDSS test at or around the circuit Drain to Source voltage in circuit.  Often all you need is a battery and a DMM set to current.

[stm]

Does anyone know of a java calculator for estimating bias in a common source JFET stage?  I suppose it isn't simple because each JFET has its characteristic correlation between Vcutoff, gm and Idss. 

There is this online calculator:
http://www.runoffgroove.com/fetzervalve.html#12

and you can use this circuit to measure the JFET parameters first:
http://www.runoffgroove.com/fetzervalve.html#11
  
JFETs do vary a lot; don't be scared because of that.  Accept it and use it in your favor: you can measure different units and audition them, then pick the ones you like best.  This is part of the *heart* of the DIY process: you customize and fine-tune the circuits to *your* needs.

JFETs are not so good if your goal is cheap and simple mass production or cloning, but this doesn't mean they are not good.  In fact, JFET stages produce a harmonic content clearly different from bipolar transistors and opamps which many people like.

[slideman82]

I think this is a job for MAC, search him (he'll reply this, that's for sure!), he's got a 3 JFET distortion that's biased like this.

[MicFarlow77]

Hi All,

Many Thanks for the replies.

In reading the Fetzer page, clipping can be induced or certianly encouraged along by adding in a source cap... course, you get the added harmonic content so that is factored in.

Question, what does adding in a gate resistor to ground do in regard to clipping and also, how does it affect the other fet parameters? I'm sure it probably would, but I'm not far enough in my understanding of this stuff yet to grasp that part of it yet... 

Also, with the series resistance to the gate.... I see that value all over the place in different fet configurations... as low as 33K in the case of the Fetzer and as high as 470K in the case of the Dr. B. In reading the Fetzer article, if I understood correctly, the series resistance sets the frequency response (along with the Miller cap)... is that the primary function of that resistance, or does it do some other jobs?

Thanks all!

Mick

[R.G.]

Does anyone know of a java calculator for estimating bias in a common source JFET stage?  I suppose it isn't simple because each JFET has its characteristic correlation between Vcutoff, gm and Idss. 

...These assumptions are rough as guts, but we're not doing rocket science.

With assumptions such as these a speadsheet could iteratively optimise the value of resistors to place around a particular JFET.  

Around any particular JFET, sure. But then if you're going to measure that stuff for a JFET, you might as well just experiment with diddling pots. Probably simpler and quicker.

It's exactly this kind of problem that effectively doomed the JFET in the electronics industry. It's just not consistent enough to do any analog electronics job that can be done some other way. The big electronics outfits were willing to pay smart guys to figure that out, and no one ever did it all that well. Sad, because there are some interesting quirks about JFETs, but realistic.

[WGTP]

IIRC there was a version of this with an LED that was used in a variation of the Shaka Bruddah that Jack Orman and Aron had come up with for clipping, I thought. 

Here it is.  http://www.diystompboxes.com/pedals/FET-OUT.GIF

[aron]

Yeah, I liked that pedal :-)

[brett]

Thanks for that link STM.  The data on that page also shows the strong link between gm and Idss (and Vcutoff).  Low Vcutoff (ie less negative), the higher the gm.  No wonder that J201s are so popular.  They conduct and amplify like crazy things.

[mac]

I built a pedal using diodes as "source resistors". I used BF245A which have a Vgs similar to the diode voltage drop. Some members interesting ideas also:

http://www.diystompboxes.com/smfforum/index.php?topic=55034.0

A simple way to test if the fets to be used have a Vgs of about 0.6 - 0.7V is to wire them as an emiter follower and measure source voltage. If you have lower Vgs fets consider a Ge diode or two.
The good thing about using a diode is that you do not need a bypass cap... well almost.


mac

[edvard]

Does anyone know of a java calculator for estimating bias in a common source JFET stage?  I suppose it isn't simple because each JFET has its characteristic correlation between Vcutoff, gm and Idss. 

Found one here:
http://www.ele.auckland.ac.nz/archives/design/tools/ampfet.htm
Wish I had it as a stand-alone...

Also, I wonder how a 1V or so Zener diode would behave? 

[mac]

Note the 10x voltage gain of the above amplifier. It is like the diode has a resistance of 100 ohms or so. The Rd/Rs rule to calculate voltage gain in low gain fets is not quite accurate but gives a rough estimate.

This was very useful in my Ge Big Muff, since Si diodes raised the Ge emiter voltage to Si transistors levels, so I used the original bias resistors; and at the same time the resistance of the diode is of the same order as the 100 ohm emiter resistor.

mac

[edvard]

OK, I just tried this last night with a circuit I'm working on.
Very nice effect. Not what I'm looking for with this particular circuit, but useful nonetheless.

FWIW, I'm using 2N5485's (until my shipment from Mouser comes in) and I had to use a 1N4148 + red LED to get it to conduct signal.
When it did, I measured the drain voltage at about 5.6V (not bad) and the gain was very much there, and a 47uf cap in parallel with the diode gave me a slight boost.
I noticed a lot of clipping "fizz" that was kind of layered over the sound of the JFET overloading. Not bad, I'll probably use this idea in another circuit.