Innerworkings of BBDs/clocks

[Taylor]

Something I've never seen or read is an in-depth explanation of what's going on inside a BBD-based delay. I have checked out schematics and datasheets, and I get the basic concept. The clock is a series of pulses, and the pulses step through the individual FET/capacitor stages, which I think dumps the charge stored in stage n into stage n+1, while simultaneously dumping the charge stored in stage n-1 into stage n. The charge is a continuously variable analog voltage which represents a single time-discrete sample of the input. Am I right so far?

What's the purpose of having CP1 and CP2, which appear to be the same clock but in antiphase?

Then, the real question, which is why I'm interested in this in the first place: how can we mess with this? Would it be possible to use 2 different clocks into the CP1 and CP2 inputs of the BBD? And would this give us any interesting/unexpected results? Different read/write speeds for example - I know, if this was possible people would have been doing it long ago, but I'm interested in exploring the idea and seeing if there are some new directions for it.

[Mark Hammer]

Why are there two clock lines?

Simple.  Think of it like canal locks.  Each step of the canal lock has to be isolated from every other.

So, your boat comes in on the right.  We'll call the three segments A, B, and C from left to right.
To move from C to B, the lock between B and C has to open.  But the lock between A and B has to stay closed in order for the water level in B to be at the right level.  When the B/C lock opens and you enter, the level in B is gradually reduced to be equal with the level in A.  But it can only do so if door B/C is closed.  Once the B level is where it needs to be, lock A/B opens, but lock B/C remains closed.

For the charge at any given moment to be "sampled", it has to be "let in" to the storage capacitor of that stage.  It can't leak forward to the next stage, and it can't leak back either.  So some doors have to be open, and some closed in order for the sample to move to the next position, just like our boat.

Two complementary clock lines are used, along with two complementary sets of stages.  For one set of stages, "tick" represents a door forward being opened to let the cap charge up, and "tock" closes the door behind it.  For the other set of stages, "tick" closes doors, while "tock" opens them.  What you end up with is two interleaved sets of alternating samples.  When you stitch them together, you get a continuously sampled signal.

The question you forgot to ask was "Why are there two outputs?".  And the reason why there are two outputs underlies the reason why there are two clock lines.

Could you "mess with" the clocklines and use unsynchronized clocks?  Yeah, I suppose you could.  Would it sound anywhere within driving distance of what you sampled?  Not bloody likely.  Maybe what a person might consider for  "bitcrusher"-like effects would be using a counter such that every Nth clock pulse to each clock line was omitted.  Each side would be slowed down by the exact same number of clock cycles, but it wouldn't be the exact same moment in time.

[Taylor]

Very nice and helpful analogy. Not like my own baffling analogies that confuse people further. 

Ok, so why are there 2 outputs? I see that one is coming from (in the MN3007) stage 1024 and the other from 1025, and they each go to a FET gate. I'm thinking that the idea here is that this alternately takes the signal/charge/sample from the odd stage or even stage, since because of the "locking" action it can't be taken from the final stage on all clock pulses, but only every other clock pulse.

Am I in the ballpark? I still am unsure why they'd give you access to both outputs. Is there any situation in which you'd want to use them separately? Taking only one output would basically be a halved sampled rate, right?

[R.G.]

Bucket brigades are that - long lines of analog charge buckets. The bucket at the input is filled with the analog voltage at the input on one clock phase.

Now -where to put the voltage/water when the clock changes? It can't go into the next bucket, that one has the previous clock's voltage in it. There has to be an intermediate bucket. So on one clock phase the real buckets fill, either from the input or the intermediate buckets between each stage. On the next clock phase, the real buckets fill from the intermediate buckets. There always has to be a bucket to which the stored voltage can be moved without losing the stored voltage it had.
Instead of moving in a straight line down the delay- buckets, the samples weave S-curves from "real" line to "intermediate" line.

The reason there are two outputs is that since there are two full lines, what I called the real buckets and intermediate buckets. The real and intermediate lines have intermediate samples in them, and so the reconstruction can be smoother if you interleave them at the output. There's no "hole" when you're not getting data. So the intermediate lines as a place to store the data between times serve for smoother reconstruction.

[Earthscum]

So the short of it is that instead of having amplitude based square waves, you have two interleaved and it forms steps. That's pretty much the conclusion I came to...

but why are there separate outputs? I assume it's so you can make it do tricks, but I've only come across maybe 2 designs that don't just connect the two outputs together... I think they just used resistors in a simple mixer type of setup.

Why have separate outputs rather than just a single pin?

[Fender3D]

Since the 2 outputs are out of phase, you can trim any leaking clock noise out, by... trimming their mix.
(usually when the delay line is longer, and when combining n-chips)

[Mark Hammer]

And the Keen-Hammer tag team wins another match!


If you look across enough BBD-based circuits, you'll see two approaches to the use of the two BBD outputs.  Some places just throw a pair of 5% same-value fixed resistors at them and let the filtering do the heavy lifting in terms of keeping the noise down.  Other places will use a trimpot on the outputs to optimally balance them for least noise.  Since each pathway within the BBD has both tick and tock, with one side getting tick as the other gets tock, you can improve the reduction of any clock-related noise by matching the two outputs carefully, and allowing those two antiphase clock artifacts to cancel each other....sort of like humbucker pickups, but at a much higher frequency.  of course, matching the levels of the two pathways optimally also means the stitched-together signal at their combined output is more faithful to the original as well.

The early Maxon AD-999 used EIGHT  BBDs, each with their own bias trimpot and balance trimpot.  Probably took as long to set those up as it took to build them, but people had high praise for the sound quality.

And for as long as I've been looking at that picture, I never noticed the footswitch before. Do you see what I see?

[StereoKills]

4PDT!

Very very interesting I must say! I just started messing around with BBDs and this helped me a great deal.

[Scruffie]

Mark I don't think that's an old unit, that's one of the new units were they've had there own BBDs produced from the Blurb I read, all new Maxon Pedals are True Bypass (I think) so use either 3PDT or 4PDT.

The chips in that are MC4107D BBDs http://img193.imageshack.us/img193/7852/dsc04743z.jpg

[Mark Hammer]

They're house-marked MN3207 or 3007 chips.  The fellow who makes Retro-Sonic pedals lives not too far from me, and bought one to "interrogate" in the process of developing his own delay pedal.  It harnesses several subordinate 3101/3102 clock generators to a master clock generator so as to take advantage of their nice small footprint whie avoiding their clock pin capacitance limitations.

remember that when the memory Man and MXR Analog Delay first entered production, they too used cascaded 1024-stage BBDs to achieve their delay time.

[Scruffie]

They're house-marked MN3207 or 3007 chips.  The fellow who makes Retro-Sonic pedals lives not too far from me, and bought one to "interrogate" in the process of developing his own delay pedal.  It harnesses several subordinate 3101/3102 clock generators to a master clock generator so as to take advantage of their nice small footprint whie avoiding their clock pin capacitance limitations.

remember that when the memory Man and MXR Analog Delay first entered production, they too used cascaded 1024-stage BBDs to achieve their delay time.

Then the Blurb was a lie, marketing that didn't tell the truth, Who'da thunk it!

Anyway, before this, weren't they using MN3007 (Could be mistaken, but that's what I thought)? So this would be a newer unit anyway, probably those Beiling Chips then but house marked as you say.

Yeah I assumed they were something simmilar to the 3102, just from there size and general layout, I wouldn't have thought they'd re-invent the wheel with there BBDs but I thought they might be a house clone of something like the 3007 atleast 

[Mark Hammer]

Well they might be MN3007.  I don't know.  I'm just saying they weren't a proprietary chip, merely a 1024-stage Panasonic BBD with a house number.  That's not a sin of any kind whatsoever.  In the world of analog stuff, and often digital stuff too, things come with specs, and any manufacturer is able to request that a contracted component be produced to be within such-and-such a spec, to the extent that they can afford to do so.

So, without knowing any more, it MIGHT be an MN3007 or MN3207 with some sort of additional quality factor or tighter spec....or it might not.  What I do feel confident in saying is that it very likely isn't anything other than an MN3x07, conceivably with a better/tighter spec.  I can't imagine any pedal manufacturer investing what it would take to develop a different chip and relying totally on sales of a pedal like the AD-999 (or any other Maxon pedals using one or more of those chips) to recoup that investment.

I also can't see any pedal manufacturer keeping the MN3007 alive for well over a decade without either flaunting it ("We use MN3007s and nobody else can!"), or arranging for them to be sold.  And as we all know, MN3007s are getting harder and harder to come by, whilst MN3207 equivalents are plentiful.  Once upon a time Mike Matthews bought up most of the world's supply of MN3005s when he had the chance, so as to keep the DMM alive, but those ran out (at least in the sort of quantities that any large scale manufacturer like EHX would need to be able to depend on).  Would Maxon have done something similar with the MN3007 and also arranged to have them house-marked?  Here we are venturing into science-fiction territory.

[R.G.]

...  his own delay pedal.  It harnesses several subordinate 3101/3102 clock generators to a master clock generator so as to take advantage of their nice small footprint whie avoiding their clock pin capacitance limitations.

At one time in the past I got a similar get-up running with a tap tempo arrangement. The clocking worked fine, but the audio quality went to pot after so many BBD chips. It is a handy clock generator, and it's absolutely critical to slave them together if you're using more than one. Clock noise heterodynes down into the audio are so ugly.

[Earthscum]

Quick question (I hope), what's the difference between the 3007 and the 3207?

I got a couple of the CoolAudio chips (clock and BBD) a couple weeks ago and most of what I can find in "short delay" circuit territory is based around the 3007. Mostly what I've come across are flanger and chorus schems that use the 3207... just me? or there a reason?

[Mark Hammer]

People have different opinions than I do, but for me the most noteworthy difference (and what I suspect is the principle reason for its existence) is that an MN3207 can work perfectly well at 5vdc, which means you can easily and cheaply regulate a 9v battery down to 5v to both power and bias the MN3207 in a stable manner until the battery starts to fade.  This poses no advantage whatsoever if the pedal is always powered by a wallwart.  But if the pedal is powered by a battery, whose voltage will change over time, it is a real advantage for the bias voltage on the BBD input to be set once, and only need to be set once.

There are S/N differences, yes, but those can be overshadowed by non-chip sources of noise very easily.  Which is why I say the difference is in how well it works with a 9v battery.

[Hides-His-Eyes]

Do they sound very different? Is the 300* consistently run at high voltages (15v?) and so associated with the sound of greater headroom?

Why is a BBD biased at 0.9Vs?