BYOC Optical Compressor on Vero help

[pappasmurfsharem]

I want to attempt to veroboard the BYOC Optical Compressor, but I'm not very good with reading schematics

Can any of you check what I have so far and let me know if there is anything technically wrong with it?

FYI the colored traces are just so I can see things easier, the jumpers would be what actually is on the final product, assuming I'm not completely wrong with the layout.

Also the coupler JPEG is oriented so the top right lead is the +.



These next images are for your reference.
On the PCB pic the bottom is mirrored to make it easier to reference

[R O Tiree]

There are some errors, yes. I haven't traced it fully, but:

1.  There's no connection between IC1 pin 5 and the 470k resistor, as per your pale green line. Move the track-split at TL to UL and then insert a jumper from TK to TL

2.  1N4001 and 100µF cap need to go to the +9V line (dk grn), not the Vref line (pale grn)

3.  You can lose rows M, N and O, as well as A and B.  With a bit of judicious track-splitting, you could also lose row F. Other savings can be made in width by standing resistors up on end, for example. Have a look at R3 (from MJ to OL) You can stand it up on its end and go direct from OJ to OL.

The trick with checking these things is to work from the schem to the board, first time through... check each component's connections to its neighbours and check them off with a red pen (for contrast). For example, Q1C to Q2C and R10R (right) and C6+, making sure that there really is a physical connection. Once you've finished, go and have a cup of tea, chill out for 10 minutes then print out a fresh copy of the schem and repeat the process, this time working from the board layout to the schem. Work carefully and thoroughly and triple-dheck anything that doesn't look right.

Part of the problem might be that you haven't "named" the components on the layout - you've just put in their values.  It gets confusing trying to decide which of the four 0.047µF caps you're supposed to be looking at, for example, or the four 100k resistors.

Hope this all helps.

[pappasmurfsharem]

There are some errors, yes. I haven't traced it fully, but:

1.  There's no connection between IC1 pin 5 and the 470k resistor, as per your pale green line. Move the track-split at TL to UL and then insert a jumper from TK to TL

2.  1N4001 and 100µF cap need to go to the +9V line (dk grn), not the Vref line (pale grn)

3.  You can lose rows M, N and O, as well as A and B.  With a bit of judicious track-splitting, you could also lose row F. Other savings can be made in width by standing resistors up on end, for example. Have a look at R3 (from MJ to OL) You can stand it up on its end and go direct from OJ to OL.

The trick with checking these things is to work from the schem to the board, first time through... check each component's connections to its neighbours and check them off with a red pen (for contrast). For example, Q1C to Q2C and R10R (right) and C6+, making sure that there really is a physical connection. Once you've finished, go and have a cup of tea, chill out for 10 minutes then print out a fresh copy of the schem and repeat the process, this time working from the board layout to the schem. Work carefully and thoroughly and triple-dheck anything that doesn't look right.

Part of the problem might be that you haven't "named" the components on the layout - you've just put in their values.  It gets confusing trying to decide which of the four 0.047µF caps you're supposed to be looking at, for example, or the four 100k resistors.

Hope this all helps.

Thanks for the help.

So for #2
Looking at the schematic.

D1 (IN4001) and C7 (100uF) need to hit the junction of V+ and R11 (100k Resistor) VS where they are currently, does it matter where they go on that line? before the resistor, after?

[R O Tiree]

Doesn't matter at all, as long as they connect from GND to V+

[pappasmurfsharem]

Doesn't matter at all, as long as they connect from GND to V+

That makes things a bit easier then. I figured the voltage just ran through everything regardless of if it was placed before or after a component on the same trace but I wasn't sure.

Another question if you look at the .047uF Ceramic cap (C4 on the schematic) on the far right (near the 33uF and the transistors Q1, Q2) there is a tracksplit under it. Is that an acceptable way to place that? My logic was the capacitor wouldn't even do anything without it because the trace would just pass the full voltage from V+ "around" it. Would I be correct in that assumption, or is the tracksplit not needed.

[R O Tiree]

You are absolutely right - the track split is needed and it will allow the cap to function.