A couple compressor questions [Rothwell Lovesqueeze content]

[midwayfair]

I breadboarded this. It's a pretty neat FET-based design with GOBS of output but not a ton of compression. My question is: the comp knob (in the feedback loop) seems to change the threshold even though it LOOKS like a ratio know to me. Am I understanding that correctly, or is R3/R4 still technically setting the threshold?

And is R12 the decay (draining C9)? It changes the sound when I reduce this resistor, but my ears don't tell me what's happening electronically.

Hope it's okay to put the schematic (from Fred Briggs's site) here for reference. If I'm stepping on any toes, please let me know and I'll delete this.


Any insight anyone has would be greatly appreciated.

[Mark Hammer]

There's no toe-stepping but there is a batch of "mislabelling" in your post.

The output of IC1B is fed through C9, to take out any stray DC, and is rectified by D3.  The rectified envelope (i.e., AC voltage that only goes on one side of the zero point) is averaged out by C10, and R11 sets how quickly C10 drains (increasing it will produce longer gain recovery times).  The resulting envelope signal is current-limited by R12 so as to be appropriate for the 2N5457 and is fed to the gate of Q1.

When Q1 is turned on more, its drain-source resistance gets lower, which increases the gain of IC1A, up to a maximum set by the parallel resistance of R15 and the Comp pot, relative to the sum of R13 plus the drain-source resistance.

The Comp pot changes how the gain change responds to changes in the JFET resistance.  If you wish to change how responsive the circuit is, you'd change the gain of IC1B, by varying either R8 or R10.  Making R10 smaller in value, or R8 larger, will increase the gain of the envelope-detector section, resulting in more change in drain-source resistance.  Because the gain of IC1B is presently fixed it is influenced by the gain of IC1A.  That's why the Comp control IS sort of a ratio control but still seems to affect the threshold.  Making the gain of IC1B variable will make ratio more independent of sensitivity/threshold.

[midwayfair]

There's no toe-stepping but there is a batch of "mislabelling" in your post.

The output of IC1B is fed through C9, to take out any stray DC, and is rectified by D3.  The rectified envelope (i.e., AC voltage that only goes on one side of the zero point) is averaged out by C10, and R11 sets how quickly C10 drains (increasing it will produce longer gain recovery times).  The resulting envelope signal is current-limited by R12 so as to be appropriate for the 2N5457 and is fed to the gate of Q1.

When Q1 is turned on more, its drain-source resistance gets lower, which increases the gain of IC1A, up to a maximum set by the parallel resistance of R15 and the Comp pot, relative to the sum of R13 plus the drain-source resistance.

The Comp pot changes how the gain change responds to changes in the JFET resistance.  If you wish to change how responsive the circuit is, you'd change the gain of IC1B, by varying either R8 or R10.  Making R10 smaller in value, or R8 larger, will increase the gain of the envelope-detector section, resulting in more change in drain-source resistance.  Because the gain of IC1B is presently fixed it is influenced by the gain of IC1A.  That's why the Comp control IS sort of a ratio control but still seems to affect the threshold.  Making the gain of IC1B variable will make ratio more independent of sensitivity/threshold.

Mark, thanks so much for this great description, as always.

I can see now too that R8 is equivalent to the 47K in the Flatline, and one of my favorite Flatline mods is to put that on a pot to alter the sensitivity to get more or less squish.

I'll experiment with all this tomorrow when I have some more amp time.

[PRR]

I started before seeing Mark's excellent reply.

Yes, the threshold is (many things including FET Vto) times the (R8/R10)+1 ratio.

> : the comp knob (in the feedback loop) seems to change the threshold even though it LOOKS like a ratio know to me.

The Comp knob sets the idle gain. However turned to zero resistance it sets the idle gain at unity and the FET can't do *anything* to reduce that. At higher resistance, the knee doesn't happen until the FET resistance approaches Comp||R15, so it must have some effect on threshold. Comp's other limit is restrained by R15.

It looks very mellow. There are other ways to do it. I'm not seeing the virtue of this plan, though I'm tired from digging.

> is R3/R4 still technically setting the threshold?

?? No, both are simple DC bias resistors, choosen to have "no" effect on audio gains or control loop action.

> is R12 the decay (draining C9)?

No.

Drain to what? The FET Gate is infinite resistance (mostly). C11 blocks DC out that path.

C_10_ is the Hold capacitor. (C9 couples audio into a voltage-doubler.) The obvious drain on C10 is R11. The 10K+10uFd values suggest 0.1S or 100mS decay time. I'd use 20mS to squash drums, 1,000mS for do-no-harm classical recording. 100mS is a fine starter value. The effective value includes the FET curve and the IC1A amplifier leverage. The "best" decay should be found on stage with R11 values 5K to 50K and C10 swapped 1uFd 10uFd 100uFd.

R12 R16 form a distortion-reduction network. The FET is symmetrical. However it has audio on one end and not on the other end. This modulates the effective voltage averaged over the whole channel. This causes even-order distortion. Ideally the control voltage should be referenced to the *middle* of the FET, not to one end. Alternatively, R12 R16 split-the-difference between control and audio, which does the same thing. For any reasonable use, R12==R16 and both can be quite large. A Meg is fine and customary. You may omit R16 for "flavor" or possibly "splatt".

[R O Tiree]

I think C10 should go the other way round - You've got the +ve terminal connected to GND?

[midwayfair]

I think C10 should go the other way round - You've got the +ve terminal connected to GND?

Yeah, I'm not sure why, but it seems to be correct (read: doesn't work properly flipped around), and it's not the only time I've seen something like that in a rectifier or phase inverter circuit. Like the EA tremolo's LFO: two of the caps have their + sides connected to ground (through a resistor, but still).

[PRR]

> C10 should go

Correct as drawn.

C9 takes the signal off of the Vref V/2 standard. The voltage doubler diodes are wired to deliver a -negative- voltage. (Put your meter on C10 and strum hard, note polarity.) C10 catches this, thus is wired negative hot, positive to common.

The goal is to drive the N-FET's gate -negative-. The FET is normally "on", negative gate voltage turns it "less-on" then "off". It is semi-resistive in this range. Assuming some trial resistances (such as 100, 1K, 10K) in the IC1A amplifier gain formula will show gain changing in the correct direction.

[midwayfair]

The goal is to drive the N-FET's gate -negative-. The FET is normally "on", negative gate voltage turns it "less-on" then "off". It is semi-resistive in this range. Assuming some trial resistances (such as 100, 1K, 10K) in the IC1A amplifier gain formula will show gain changing in the correct direction.

This brings up an interesting question: Is swing to negative part of the reason they've gone with half-wave rectification here, or is it more likely a matter of convenience, low-parts usage, or that there's no need to do full-wave so why waste the parts and space? In other words, would full-wave rectification in a situation like this be a potential improvement or just make it stop working?

Also, thanks for being so generous with your gooey brain innards!

[Mark Hammer]

Full-wave can provide improvements in minimizing audible ripple, simply by effectively doubling the rate at which the ripple happens, so that it takes less to smooth it out.  But many compressor manufacturers seems to be able to get away with half-wave rectification without inviting too much regret.

Personally, I'd be more at ease with half-wave if the control element were an LDR rather than a FET, simply because the latter is more responsive to instantaneous changes, and the former is more immune to ripple, simply by virtue of its sluggishness.

Of course, if you stick in a longer decay time, the ripple can be readily tamed even with more responsive control elements (FET, OTA),.

[PRR]

> half-wave rectification

It's true peak-to-peak, not "half-wave".

I skimmed over C9. It charges through D2 to the positive half-wave. D3 catches the negative peak +plus+ whatever is on C9.

It isn't the most perfect plan available. If your first transient is positive, nothing happens on that half-cycle. For a simple SIN wave, action is delayed almost 1.5 half-cycles from the start of the SIN, 1 half-cycle from the first (positive) peak.

And yes, it is cheap.

For radio broadcast, where overmodulation is illegal, we need fast attack and as-soon-as a peak happens. Overmodulating a 50,000 Watt AM rig throws 'splats' into the frequencies assigned to other broadcasters and radio services. (However there is some tolerance for very short overmodulation, and some older broadcast limiters used schemes similar to this.)

In music creation, you often WANT a blip of clipping on initial transients. A "perfect" never-allows-clipping limiter can sound dull and flat. Stage amps are selected to sound not-awful when clipped. A little splat on the attack tends to make up for the loss of true dynamic. So an imperfect rectifier is not a bad thing.