Payback V1.1 Vibrato mod

[armdnrdy]

I'm working on The Tone God's second venture in the looper category, the Payback V1.1, which incorporates the Nuvoton ISD1600 series voice record and playback IC.

I've read through all of the threads as well as the data sheets and Nuvoton design guide PDF. My plans to route the board include keeping all of the power and grounds separate, (as per schematic and data sheet) and placing the ISD IC on the trace side of the board. (The only readily available 1600 series IC is a SOIC-16 surface mount chip)

There is a "mod" that includes adding vibrato and pitch shift with the inclusion of an external clock. I plan to add a CD4047 clock and use a pot across the R, and R/C pins as a "speed" control.

The problem is....the Vibrato circuit depicted on The Tone God's sight doesn't make sense to me! Here is the description of the circuit from his sight.

Vibrato

Some people like adding vibrato to the playback. In Payback v1.0 the vibrato was achieved by adjusting the voltage to the ISD2500 on playback. I suspect that varying the voltage supply caused a change to the internal clock speed changing the speed of the playback and with it the pitch much like a record player. The problem with the doing vibrato with this method is if you drop the voltage too much you can cause the IC to fail. Furthermore because the vibrato circuit is part of the power supply if you did not get the vibrato to work properly the IC may not get power at all and fail completely.

With the ISD1600B the clock is set externally through the Rosc input (pin 14) with a resistor to ground. Adjusting the relationship to ground changes the clock speed. No more messing around with the power supply. Connecting a clock source to the Rosc input altering the voltage will change the clock speed and pitch of the playback. You can use a clock source of your choice and set it to you tastes. Putting a pot in parallel will vary how far the clock source can sweep giving us a depth control.

It would be a good idea to disable the vibrato during recording. Using a spare NAND gate from the 4093 with it's inputs connected to the REC pin you can drive a NPN transistor to ground the clock resistor connection overriding the clock source (Figure .



The description says to connect the spare NAND gate inputs to the "record" pin. Upstream the record pin is connected to another NAND gate input (U2C) which has a pull up resistor. That pull up resistor should keep our "spare" vibrato NAND gate inputs high until the U2C gate inputs are sent low when the record switch is grounded.

Now if our vibrato NAND gate inputs are high, this will cause the output to be low which sends the base of Q1 low which keeps the clock signal from completing a circuit. Are you still with me? 

Anyway...It looks to me like there is a mistake in the drawing. Can someone take a look to confirm this? It looks like there needs to be a connection between R1, R2, lug 3 of the Depth pot, and the collector of Q1.

Here's the full schematic: