Confusion over Voltage vs Current gain, Common configs.

[Thecomedian]

Whereas a BJT device controls a large output (collector) current by means of a relatively small input (base) current, the FET device controls an output (drain) current by means of a small input (gate-voltage) voltage. In general, therefore, the BJT is a current-controlled device and the FET is a voltage-controlled device. In both cases, however, the output current is the controlled variable.

Although the common-source configuration is the most popular, providing an inverted, amplified signal, common-drain (source-follower) circuits providing unity gain with no inversion and common-gate circuits providing gain with no inversion.

http://www.talkingelectronics.com/projects/TheTransistorAmplifier/TheTransistorAmplifier-P3.html


So, in both instances, we are working with Current to cause an increase in the Signal Voltage, by increasing the current flow through the transistor and then creating a large "voltage gain wall", via Resistors or Potentiometers in the output of the circuit.

Both FETs and BJTs have a "common gate/common base", config, where voltage gain is "zero", and current gain is high.

Wouldn't you get a voltage gain by using a resistor/pot to convert that increased current into large voltage?

Alternatively, if you're getting a "high voltage gain", couldnt you convert it to high current via

http://www.talkingelectronics.com/projects/TheTransistorAmplifier/TheTransistorAmplifier-P2.html#V-to-Current

[kingswayguitar]

not sure if it's related and i don't have a technical answer, but have you ever put a jfet boost in front of a fuzzface or other bjt circuit

BAM! big increase

[R.G.]

So, in both instances, we are working with Current to cause an increase in the Signal Voltage, by increasing the current flow through the transistor and then creating a large "voltage gain wall", via Resistors or Potentiometers in the output of the circuit.

I taught an electronics circuits lab for sophomores back in the dark ages before microcontrollers, and you're wandering in the same dark forest as some of the people there.

First, let me point you to the UK term for tubes. They call them "valves", and accurately so. Tubes are electron valves, in that the voltage on the grid disallows to some degree or other the flow of electrons from a cathode to a plate, driven by a voltage "pressure". The water analogy is quite apt here. The electrical voltage "pressure" tries to force electrons to flow from cathode to plate. The grid shuts this flow off by its voltage literally occluding the area the electrons have to flow through. The minimum flow is zero, when the grid shuts off the electron flow entirely. The maximum flow is limited by the abilities of the power supply, the resistors in series with the valve, and the ability of the valve to flow electrons when the grid isn't holding things up. It's very much like a valve at the end of a hose.

Note that the electron valve does not create flow, nor pressure. It allows or shuts off to some extent whatever flow would otherwise happen if it were not holding things up. It's a valve.

The word transistor is a composite of "transfer" and "resistor". The way transistors work is that doing something to an input terminal allows/disallows current flow through the body of the device. The current which flows is limited in different ways with bipolars, JFETs and MOSFETs, but they all do similar things, valving down a current flow which would flow through the circuit if unchecked.

The point I'm belaboring is that tubes/valves and transistors do not create current flow. They allow/disallow it somewhat proportionately to the voltage or current  of the control node compared to the channel.

Both FETs and BJTs have a "common gate/common base", config, where voltage gain is "zero", and current gain is high.
Wouldn't you get a voltage gain by using a resistor/pot to convert that increased current into large voltage?

I believe you're talking about common source/emitter. Common gate/base configs have current gains of zero and high voltage gains if set up suitably.

In the common gate/base circuit, the common terminal is the gate/base, which is AC-grounded by a capacitor in most cases. The input signal is supplied to the source/emitter. With the gate/base held fixed, any change on the source/emitter amounts to a change in the gate/base with respect to the source/emitter, which gets you the valving action. The valving action modulates the current which the source/emitter would otherwise allow to flow to the drain/collector.

Alternatively, if you're getting a "high voltage gain", couldnt you convert it to high current via

It just struck me. You're confusing input and output parameters. What is happening inside the device is this valving of whatever current would flow if the device is not obstructing things. The conditions of current gain and/or voltage gain happen as a result of how the external parts - usually resistors - reflect that change in currents.

[Thecomedian]

This is true. I think all of the website resources I have looked at for understanding transistors and electron/carrier flow have equated it to water and dams.

If you have 9v in a battery the transistor wont be able to make more juice than you have to offer. The gain is by creating a larger signal voltage having small change at base/gate/grid cause large change in current at c/e, s/s, a/c.

Would a emitter follow, which is supposed to current gain by B+1 or (1/1-a), need another transistor of the common emitter variety between it and the output in order to transform that gained current into gained voltage?

[R.G.]

Would a emitter follow, which is supposed to current gain by B+1 or (1/1-a), need another transistor of the common emitter variety between it and the output in order to transform that gained current into gained voltage?

While it is true that a common emitter stage after a common collector (emitter follower) stage does generate voltage gain, it does not do it the way you are thinking, if I understand you.

A common collector (emitter follower) stage has near-unity gain because it has 100% negative feedback.  It has a current gain, in the sense that a small current in the base controls a much larger current in the collector-emitter path. But it inherently has that 100% negative feedback.

A common emitter stage has voltage gain because the small changes in current at the base control a larger current change in the collector-emitter path, and with the resistor in the collector side of things, the larger change in current is made into a smaller OR larger voltage than the voltage change on the base depending on the value of the collector resistor.

So a common emitter stage after a common collector/follower stage would have voltage gain, but it is not transforming the current gain of the follower into that gain.

I think an example is in order. Imagine an NPN with a 9V power supply, and a 10K resistor from collector to 9V **and** a 10K from the emitter to ground.

The base is biased by some resistors up to 3.6V; how this is done is not terribly important for this example.

The base sits at 3.6V, held by its biasing resistor. Imagine the emitter was pulled up to +9V somehow, and we then let it go. The emitter voltage starts falling. Initially, the emitter is higher than the base, so the base-emitter diode is reverse biased, and no base current flows, so no enhancement of the base-collector region happens, so the collector does not flow current. When the emitter drops to 3.0V, the base to emitter voltage gets to the conduction threshold of a silicon diode junction, and exponentially more current flows for each tiny bit of additional voltage. The influx of base current "poisons" the ability of the collector junction to hold off current flow, so the collector lets current through in an amount of HFE times the base current at any instant.

The 1+HFE times the actual base current flows to ground through the emitter resistor. The emitter resistor must generate a voltage proportional to the current flow, so the emitter voltage stops falling and rises - and as it does so, each increment it rises also "cancels" some of the base-emitter voltage that is letting in base current, which is generating 1+HFE times the current in the emitter. So you have a negative feedback setup, and it will stabilize where the emitter voltage is one base-emitter voltage drop below the base voltage, which is held in place by the biasing network.

Raise the base voltage a little with a signal, and the emitter follows it up. Lower it a bit and the emitter follows it down.

Notice that I haven't said anything about the collector. Let's look at that now.

If 1+HFE times the base current flows in the emitter, then HFE times the base current flows in the collector. If HFE is over 100, we can ignore the difference in 1+HFE and HFE. The emitter resistor has 3V (about) across it. The collector resistor has 99% of the same current flowing in it, so it will have 99% of the same voltage, and we just said we were going to ignore the 1% difference. So the collector resistor has approximately the same current in it as the emitter. The emitter voltage is 3V up from ground, and the collector voltage is 3V down from 9V.

When the base voltage goes up, the emitter voltage goes up, and the collector voltage goes down. The amount they go up and down depends on the values of the collector and emitter resistors. In this example, they are both 10K, so the collector goes down by the same (approximately ) voltage the emitter goes up. They are inverted from one another, and since they have the same current through equal resistors, they move the same amount.

Whether this circuit is called a common collector or a common emitter depends entirely on whether you take the output signal from the emitter or collector. The signal output is equal  and out of phase from emitter and collector. In fact, you can take signals from BOTH collector and emitter and use it as a phase splitter, provding a following (at the emitter) and inverted (at the collector) signal at the same time.

Do you understand this example? When you do, we'll get on to adding another stage.

[Thecomedian]

okay so the common collector does have increased current, but follows the change in current at at near 1:1 ratio as changes to base current, so, a current of +/-5 mA at base would impart +/- 5mA on top of the current in the output circuit. If theoutput circuit is 100 mA, then it will range from 105 to 95 mA.


if you chain CC to CE, it is the +/- 5mA difference that would be magnified by the CE, and the rest of the mA would be mostly disregarded?

[R.G.]

okay so the common collector does have increased current, but follows the change in current at at near 1:1 ratio as changes to base current, so, a current of +/-5 mA at base would impart +/- 5mA on top of the current in the output circuit. If theoutput circuit is 100 mA, then it will range from 105 to 95 mA.

Not quite.

The common collector/follower circuit has increased current flowing in the collector-emitter compared to the base.

However, remember that voltage-feedback thing on the emitter resistor? If the base increases a fraction of a volt by signal pulling it up, the emitter moves up to follow it. This means that the base can move up or down a LARGE voltage with only a tiny change in input current, because the emitter is moving to take the "voltage pressure" off it. So the action of the circuit is not so much to amplify the current into the base, but to prevent the base current from changing much by following the base voltage.

This is good, because by doing this, the base does not "eat" much of the incoming signal current; it has a high impedance, driven mostly by the incoming voltage signal, and so it does not load down the incoming signal much. Therefore, we can use it for a buffer, with a high input impedance. The emitter following the base actively tries to minimize the change in base current.

What happens is a bit backwards from how you're thinking, and is one of the big humps to get over in designing transistor circuits. You have to simply decide how much current you want flowing in the collector-emitter for output reasons, then arrange the base circuit to make that come true. It's counter-intuitive. Some experienced tube engineers never could make the jump and were lost to the industry earlier than they would otherwise have been.

If you needed a current of 100ma in the collector/emitter for some reason to do with the load you'll be driving, you decide that first, then work backwards. You look at the signal source and see how much voltage and current it can stand to drive to achieve your objectives for the output, then pick a transistor with at least the amount of current gain (ideally more~!) that will make that come true.

This is an important and very, very good thing. HFE varies (a lot!) so you'd have real problems getting the exact value you needed. By setting up a circuit where we only have to have enough, we gain a huge degree of freedom in design.

It's true that if you have a change of +/-5ma in the base, then the emitter current changes by +/-5ma times the HFE. The thing you're missing is that the transistor will do its level best to NOT let you make a 5ma change in the base because the negative feedback on the emitter tries to counteract changes in the base circuit away from the zero-signal bias point.

if you chain CC to CE, it is the +/- 5mA difference that would be magnified by the CE, and the rest of the mA would be mostly disregarded?

You've just re-invented the darlington connection.

[Thecomedian]

Yes, it appears that maybe I was thinking backwards due to the large emphasis on biasing the base in order to control the flow. It makes much more sense to consider how much you want flowing through V/Ibe, since Rc and Re will affect any self/voltage divider biasing as well. That's what I would call another one of the "humps". Change one part in the circuit, changes every other part in the circuit, like putting up wallpaper with air bubbles under it.

I was considering that you might use the CC stage to run a CE stage, but the CC stage has Re to ground and Rc to Rail. I didn't think that was a "darlington", or maybe just didnt make the connection. From what I understand about Darls, they are considered 3 terminal devices, which requires the collectors to be connected and the emitter of Q1 to connect directly to the base of Q2. I suppose there's no problem in putting resistors between these connections, because they would basically emulate another set of internal resistance inside this emulated "high gain single transistor". If the common collector is it's own discrete "stage", via Rc to rail and Re to ground, then would it just be a weaker or less optimal darlington?

[R.G.]

I was considering that you might use the CC stage to run a CE stage,

Back when circuits were taught in EE schools, all the possible two-stage combinations of CE, CC, and CB were usually presented and analyzed, sometimes as an exercise for the students. All of them do different things.

but the CC stage has Re to ground and Rc to Rail.

Hmmm. I think you're letting where the resistors are guide your thinking. That's a big limitation, and it leads you down side roads that are poorly marked. Whether a transistor connection is common collector, common base, or common emitter has little to do with where the resistors are. It has everything to do with which of the three terminals are common to both the input and output sides of the circuit. It is entirely possible to (as an example) set up an NPN with two resistors as a divider biasing the base, a resistor to ground from the emitter and a resistor to V+ from the collector. You are free to put input signal into any of the pins through a capacitor to avoid upsetting the DC conditions and take output put from either of the other two pins, all without changing anything about where the resistors are.

For instance:

If you "ground" the base for AC purposes by putting a BFC from base to ground, and insert a signal into the emitter, you can take an output signal from the collector. This is "common base".

If you insert a signal into the base, you may take an output signal from the emitter, in which case it's being used as a common collector, the power supply being an "AC short circuit" to ground. For the same input to the base, you can take your signal from the collector, in which case it's being used as common emitter.

You can insert signal into the collector and take signals from the base or emitter, but the collector has such a high impedance that you get no useful output either place, so these two connections are never used.

Notice that nothing changed about the resistors or DC bias. Only where the signal was put in and then taken out changed.

I didn't think that was a "darlington", or maybe just didnt make the connection. From what I understand about Darls, they are considered 3 terminal devices, which requires the collectors to be connected and the emitter of Q1 to connect directly to the base of Q2. I suppose there's no problem in putting resistors between these connections, because they would basically emulate another set of internal resistance inside this emulated "high gain single transistor".

That is correct. The essence of the Darlington connection is the emitter of one transistor feeding the base of the second one directly, effectively multiplying the two current gains. Where the first collector goes is generally the second collector, but does not have to be. In the Univibe, this is what is done for all four gain stages. You get pretty much the exact same operation if you replace the two transistors with one darlington. There are minor advantages and disadvantages to hooking the first collector to a different power supply or to the second collector.

If the common collector is it's own discrete "stage", via Rc to rail and Re to ground, then would it just be a weaker or less optimal darlington?

Mmmmm. That's an odd way to look at it. It is true that a single stage with an NPN versus a Darlington behave much the same, with the differences being the much lower gain for the single device, and the 2x higher base-emitter drop of the Darlington and the Darlington's inability to saturate to as low a voltage between collector and emitter.

But yes, you can look at it that way, I guess.

[Thecomedian]

so just for clarity, these are both darlington pairs?

[R.G.]

so just for clarity, these are both darlington pairs?

The words of the Bard come back to me: "What's in a name? That which we call a rose by any other name would smell as sweet." Romeo and Juliet (II, ii, 1-2)

I don't know that there's an official naming convention for it. I would call them both Darlingtons, but I'm sure that there are purists who would call the first a Darlington Pair, and the other "Darlington Connected".

Shrug.

Actually, what you do with the extraneous resistors and such in the second diagram can be used to refine up some of the issues that a pure, unarguably  Darlington device (as opposed to "pair" or "connected") might have. Pure monolithic Darlingtons can have issues with speed, saturation, and current density issues. Even the monolithic Darlington devices have internal resistors and perhaps other stuff to keep both devices happy.

So are they both Darlingtons? I say yes. I'm sure there are people somewhere who would call one of them a "fluxnagle". Shrug.

[PRR]

What Darlington patented was the monolythic pair (and triple, in several variations).

Technically two lumps of epoxy are not what Darlington patented. Yes, we DO say "Darlington" even when it is two devices.

Your latest figure: what does R1 do? It does not aid input or output. It is not needed. (Not needed for basic how-it-works tutorial; you _do_ find such resistors in refined robust products to protect Q1 from horrible overload at Q2.)

[Thecomedian]

Well, the Fuzz Face is a cascade. Darlington pairs are not Szlikai (sp) pairs, not complementary CC buffer, Not cascode, not current mirror, etc.

All the reference material I find talks about collectors being directly connected and base to emitter. There are sometimes shunt and feedback resistors for a darlington pair, but the essence of tying to the base and being a node "above a Q2 Resistor have one thing in common with the collector: they share the same current, which they combine to form the limits of voltage and current within their own little circuit.

If I put a voltage divider bias on Q2, a 1.4v is no longer needed on Q1 base, since the supply voltage can provide the 0.7v required for the base of Q2, and the control voltage or a biasing coming from supply can supply 0.7v to Q1.

The key thing I think is that it is a three terminal part, in which the internal circuit of an integrated darlington pair is isolated from the rest of the cricuit except through the base, emitter, collector leads. Extrapolating to two discreet transistors in darlington pair formation, any resistor from Q1 emitter/Q2 base node directly to ground adds a fourth terminal, which breaks the "scheme" of darling pair.

R1 added to the pair above separates the collectors from being directly tied and sharing the same V/I, which again turns it into a 4 terminal design.

I suppose what I was thinking is that there was some qualifying rules about it: "All pairs are connected Q1 emitter to Q2 base are darlington, but not all pairs connected Q1 emitter to Q2 base are darlington".

(disregard the socks)



Most configs follow that rule. They do start to jump out now that I have built up the concept in my head.

would you consider this last LTspice scheme to be darlington pair?

As far as integrated DTP packages, they have a diode placed from collector(s) to emitter, in order to protect from those overvoltages/currents.

http://youtu.be/4BDh_2peKVs?t=6m31s

[R.G.]

If I put a voltage divider bias on Q2, a 1.4v is no longer needed on Q1 base, since the supply voltage can provide the 0.7v required for the base of Q2, and the control voltage or a biasing coming from supply can supply 0.7v to Q1.

Actually, nothing will happen on Q1 until its base gets to 2*Vbe. R2 and R5 are parallel, and in effect one single resistor. They hold the base of Q2 high enough for conduction as long as the voltage divider setup with R6 allows that. Q1 doesn't enter into things unless and until its base is one Vbe higher yet. If the voltage on the base of Q1 is only one Vbe, then no current flows because the voltage on the emitter and base are nearly the same, so no base current flows, and hence Q1 is off.

The key thing I think is that it is a three terminal part, in which the internal circuit of an integrated darlington pair is isolated from the rest of the cricuit except through the base, emitter, collector leads. Extrapolating to two discreet transistors in darlington pair formation, any resistor from Q1 emitter/Q2 base node directly to ground adds a fourth terminal, which breaks the "scheme" of darling pair

Weeeell, not exactly. Most monolithic darlingtons have internal resistances from base to emitter of both transistors. It helps the turn-off of the composite device.

Once again, that which we call a rose; trying to define "darlington" as closely as you're trying to do it is probably fun, but in real designs, you're looking for whether you have a base-emitter-base-emitter cascade, and enough freedom in the power supply and collector connections to allow beta multiplication to happen.

As far as integrated DTP packages, they have a diode placed from collector(s) to emitter, in order to protect from those overvoltages/currents.

Again, nominally "darlington" devices may have lots of stuff put inside to help get better performance or protection in actual use.

As a personal sidelight, one of our patent attorneys refused to file a patent application on my disclosure of some regulator structure or other because he found one place in the circuit where an emitter touched a base, called that a "Darlington" and decide that prior art would invalidate the whole circuit being patentable. As they say, those who can, do; those who can't become patent attorneys...