Mu-amp JFET selection?

[nocentelli]

In almost every circuit that uses one single JFET per stage, a drain trimmer is usually suggested to adjust the bias to 4.5v or whatever OR it is suggested one selects a particular JFET to give 4.5v with a given resistor.

I have a pile of JFETs that don't work well in such circuits: They require a very large or very small resistor on the drain to reach the desired voltage, and don't sound good in such circuits. Will they work in a muamp configuration? i.e. Does the muamp arrangement somehow negate these problems?

[amptramp]

In contrast with bipolar transistors which have a tightly controlled Vbe, the Vgs of JFET's to achieve a given drain current can be all over the place.  In some designs, there is a source resistor that increases the negative bias if the current is too high and tends to stabilize the performance of the gain stage against transconductance and Vgs variations.  Changing a drain resistor is not really a good way to handle this problem because the stage gain is approximately (transconductance X drain resistor) if there is no source resistor.  The correct way to design for JFET variations is to vary the bias until the designed drain resistor sits at 4.5 volts or whatever the voltage is supposed to be.

The µ-amp or SRPP (shunt regulated push-pull) as the stage is sometimes known still has the same problem with the bottom JFET in the totem pole and adds a new problem: the resistor from the lower drain to the upper source should be (1/ transconductance) of the upper JFET so that the upper transistor increases its current in the same amount the lower transistor reduces its current with signal input and vice versa for the opposite input polarity for minimum distortion and maximum headroom.  Note that the SRPP stage is a power amp that has to work into a matched impedance.  The normal difference in upper and lower transistor current has to be taken by the load or the stage becomes a limiter that goes close to the upper or lower power rail voltage with very little dynamic range in between.  The probability of getting the upper JFET to bias properly with the source resistor set for equal voltage change with input signal is quite small for random JFET's, but it can be done if they are selected.

So in answer to your question, the bias is the problem (and the solution) whereas adjusting the drain resistor just adapts the stage to the amount of current flowing in it, changing the gain.  The µ-amp is not going to solve the problem and will add another set of problems.  This doesn't make it impossible to design with JFET's - you just have to understand their limitations and use selected devices or bias adjustments to accommodate their variations.