Why use DC blocking caps in electronic switching?

[JFace]

In every boss switching scheme I've seen, there are dc blocking electrolytics on the input and output of the switching jfets. However, in many cases, the signal prior to the switch is biased at 4.5V, and the signal out of the jfet arrangement is also biased at 4.5V. Why does the jfet still have its own bias resistors and dc blocking caps if the bias is already there? I have seen this arrangement with CMOS switching as well. Is it ok to eliminate the caps and the bias resistors for the switching jfets if the preceding and post stages are already dc biased at the same potential?

[R.G.]

There are several reasons that all add up to that.

In the Boss/Ibanez scheme, the JFETs need to be raised off ground by several volts so the flipflop that does the bypass switching can pull the gate well below the source voltage. It's simpler in a single supply pedal to raise the source than lower the switch signal below ground. The bias voltage is a handy DC voltage to put this at. As to why they don't just leave the JFET connected to things that are already at "4.5v", it's because 4.5V is not exactly 4.5V everywhere. Because the things that use 4.5V also use some current from it or let current into it, the voltage right at those points may be tens of millvolts different from the "4.5V" elsewhere, and switching the JFET introduces the differences between the *exact* value of the bias voltage at differen points as a signal step - which is heard as a tick or pop. There is one way to make sure that there is really 0.000V across a resistor (any resistor, including a copper PCB trace), and that is to force the current through it to be zero. The caps which break the DC path from the nominally 4.5V places to the JFET let the bias resistors to the JFET make sure that the DC voltage on each side of the JFET is the same, almost exactly. This gets rid of the first and second order inaccuracies that make for ticks and pops, and leaves on the third- through fifty-seventh-order effects, which are much smaller.

In the CMOS switching scheme, you have the same issues with switching things that are nominally the same voltage but not quite exactly the same, as well as the internally generated feedthrough of the fast logic signal that tells the switches to switch. It happens that CMOS switches tend to cancel out the logic signal feedthrough if they're biased at half their DC supply on the switching pins. It is lucky that this is the same condition that helps with not switching slightly different DC levels as in JFETs.

Both of these are explained in the articles on the Technology of Boss and Ibanez bypassing and the CD4053 switching articles at geofex.com.

[JFace]

Thank you for your explanation; that is clear to me.

Suppose we use a TL072, we use one opamp as a buffer, followed by a JFET switch (no dc blocking caps) followed by the other opamp as an output buffer. Each opamp is biased at 4.5V through a 1M resistor. The bias current for a TL072 is typically 65 pA. This is a voltage drop of 0.00007. If the other opamp has a bias current on the upper limit indicated in the datasheet of 200 pA, this is a voltage drop of 0.0002. Would switching between these two DC values be heard as a pop? It seems as though the leakage of the caps could account for more of a difference than this. I realize this is an "ideal" situation and the voltages are more likely to vary on either side of the switch when using components with current demands that are above the pico range. I'm sure boss/ibanez would have omitted the components if they made no discernible difference.

[R.G.]

Suppose we use a TL072, we use one opamp as a buffer, followed by a JFET switch (no dc blocking caps) followed by the other opamp as an output buffer. Each opamp is biased at 4.5V through a 1M resistor. The bias current for a TL072 is typically 65 pA. This is a voltage drop of 0.00007. If the other opamp has a bias current on the upper limit indicated in the datasheet of 200 pA, this is a voltage drop of 0.0002. Would switching between these two DC values be heard as a pop? It seems as though the leakage of the caps could account for more of a difference than this.

Bias currents make up a bigger difference when bipolar-input opamps are used. JFET inputs have so little leakage that their bias current offsets are negligible. You're right, the bias offsets of a JFET or MOSFET input opamps are not issues.

However, all opamps have input offset errors. The output will differ from the ideal output level as set by the +/- inputs and gain components by some amount. These are often in the range of 10-20mV, and can be made worse by DC gain in the circuit. Worse, since these are caused by internal non-ideal behavior, they may be in either the positive or negative direction, and so may add or cancel. 10-20mV is a small error, but it can be noticeable, especially if there are gain stages after a switch that converts a DC offset into a transient jump.

There are circuit techniques for minimizing offset errors and preventing amplifying bias current offsets in DC-coupled chains of amplifiers. However, where the signal is intended to be purely audio, it is simpler and often cheaper to include series capacitors to break the DC coupling every so often and keep the offset errors and bias errors low. I guess that's another version of what's happening with a switch, as well.

[merlinb]

Here's an example where only one cap is used (because the PT2399 has a Vref of 2.5V rather than 4.5V), just to illustrate that you can sometime get away without a cap or two!  

[Transmogrifox]

Probably most of the time you can get away with leaving these out -- even in the typical high-gain overdrive or fuzz pedal.  That's the difference between a hand-made circuit tested and trimmed as needed by the maker or a technician.

When you make hundreds or more of these, you have to at the very least design to a root sum of squares of error sources -- higher end designs to worst-case.  Those corner cases will drive a decision to add DC blocking when in the typical circuit behavior it is not necessary.

I work in an industry where we not only have to design around component process variables specified at 25C, but we meet design specs from -40C to +85C -- which in some switching power supplies may translate to temperatures up to 120C on the PCB...hot enough to boil water.

When I first started doing this kind of work I scratched my head a lot about things I saw in circuits that didn't make sense, or appeared to be careless design (like a resistor divider for Vref on an A/D converter biased to some strange value only to find the statistical deviation on an offset error about this nominal point from design criteria was minimized over the whole operating and process variation for the components chosen).

In a commercial design you will see things driven by constraints the DIY'er doesn't have.  As DIY'ers we can get away with a lot more irreverent circuit design than what would fly in a mass manufacturing environment.  We can control our circuits on a part-per-part basis (like hand-selected germaniums).  Statistically we are likely to get parts that are close to the datasheet's published typical values.   For a company wanting to make a good impression on their customers, a pair of $0.25 capacitors on every unit is far cheaper than a bad reputation spreading from the small percent of units that didn't work out.

That said, if you want to save some board space or a few pennies, you can really do without a lot of things that would otherwise make sense in a commercial setting.

[PRR]

> design to a root sum of squares of error sources

Also (in *this* racket) the sum of squares of user complaints.

I know a fine recording with a full-power switch POP in the middle.

OTOH there's always some user why complains bitterly about a  pop   that can only be heard with your ear right against the speaker, at gains so high you'd never put your ear there.

And for guys like BOSS the cap-cost is small because they buy them by the truckload.

[R.G.]

As a philosophical point, there is a difference between being able to just barely do something, and being able to do it easily and in good order.

For instance: eating. Eating is entirely possible without any utensils at all. The knife was an advance that let one hack off chunks of food without tearing them away with the fingers. Big advance!  But it wasn't until the advent of the fork in the middle ages that eating could ever become something that didn't require washing up afterwards.

For instance: too many sports and music anecdotes to count, where someone does something, then someone else does the same thing better, easier, more quietly, with greater mastery. Hmm - think of the scene in Crossroads where Vai's character is winning the guitar shootout until the protagonist trots out a long, fast, smooth classical arpeggio.

Just barely being able to do something at all is meritorious, but being able to do it smoothly, quietly, and with mastery is quite something else.

I'm a product of my experience. The engineers I worked with were of the opinion that sure, you could get any circuit to work once. But can you do it 100,000 times in a row, when it's made from parts that barely meet spec, put together by contractors that hire the lowest cost help? For a product lifetime of 20,000 power on hours? With no field maintenance whatsoever and no trimmers? Working in that environment could be humbling.

It's my personal opinion that circits should be "polite". They should do what they were designed to do, without a lot of annoying side effects.

But there is such a thing as not overdesigning. So if the whole product run is one device, sure, tweak the devil out of it, or just live with and come to accept if not like the oddities and funny noises. If funny noises were part of the objectives, enjoy them.  But learn how to design them out against the day that you have to make smooth, quiet, polite circuits.