Questions about CD4053 electronic switching

[D.C.]

Hello. I'm new here. I've built four pedals in the three years since I discovered this hobby, and lately I'm starting to dig a little more into it. All four of my builds so far have used mechanical 3PDT switches, and I'm starting to look into electronic switching. I have some questions about R.G. Keen's CD4053 article (http://www.geofex.com/article_folders/cd4053/cd4053.htm).

1. Should I try to isolate my analog and digital grounds? I've always heard that digital circuits are noisy, and that it's wise to keep the digital ground separate from analog ground. But I don't know how to physically do that. I've always just daisy-chained all of my grounds together (DC power, effect, input/output jack, LED...).

2. To what extent is this considered "true bypass"? I saw someone say that it's a good idea to use a buffer any time you do electronic switching.

3. What do the 510K resistors in the first circuit (or 1M in the second circuit) do? Why couldn't I just run Vr straight from the voltage divider to the input pin? I understand that the capacitors coming from the inputs are to remove the DC offset, and I understand that the voltage divider drops 9V down to 4.5V, but I don't really follow what the 1M resistors do.

4. Is it a good idea to ground the unused input (pin 4, marked "Z")? I've heard that you should "always" ground unused inputs on CMOS chips.



Just FYI: I'm looking into using this CD4053 chip so I can do both momentary and latching bypass on a tremolo effect. I want a latching switch to turn the effect on and off, and a momentary switch that temporarily reverses the state. (So, if the effect is latched on, the effect would momentarily turn off. If latched off, it would momentarily turn on.) I've drawn up a circuit that uses two momentary SPDT switches, each of which controls a NAND latch. Then I feed the latch outputs to an XOR gate, which will run to the CD4053 to turn the effect on or off. (I'll also use the XOR output to turn an LED on and off.) It's a lot of circuitry (three digital ICs, plus resistors and capacitors), but I plan to put it all into a 1590BB; I think it'll all fit.

[R.G.]

1. Should I try to isolate my analog and digital grounds? I've always heard that digital circuits are noisy, and that it's wise to keep the digital ground separate from analog ground. But I don't know how to physically do that. I've always just daisy-chained all of my grounds together (DC power, effect, input/output jack, LED...).

In this instance, you can probably ignore that. It's correct for more burly applications of logic, but in this instance, you're probably fine. The real issue is sudden changes in current through the signal grounding wires being converted into signal noise. The 4053 and in particular the control input used in the suggested circuit just don't switch all that much current.

2. To what extent is this considered "true bypass"?

It's not considered "true bypass" at all, in any way. The input and output are not physically disconnected from the effect when in bypass. However, true bypass has its own problems, and is in many ways a solution to a problem we no longer have with well-designed pedals.

I saw someone say that it's a good idea to use a buffer any time you do electronic switching.

I've seen people say the most *amazing* things on the internet, and get them accepted as the truth. I would say this a different way: with only a very few exceptions, it's a good idea to use a buffer as close to the guitar as you can get it, inside the guitar if you can. This completely stops the degradation of the guitar's signal by cables, other loading, and switching. The qualifier that needs put on every comment is to question whether each circuit recommended is "well designed". Sadly, much of what is on the internet is  - well, let's just say not well designed.

3. What do the 510K resistors in the first circuit (or 1M in the second circuit) do?

They bias the CMOS switching pins in the middle of the power supply to the CMOS chip. This results in the lowest feedthrough of the sudden change of the internal switch circuit as "pops" and clicks.

Why couldn't I just run Vr straight from the voltage divider to the input pin?

Because the reference voltage is itself a low impedance, and this would load down the incoming (and usually fragile) guitar signal.

I understand that the capacitors coming from the inputs are to remove the DC offset, and I understand that the voltage divider drops 9V down to 4.5V, but I don't really follow what the 1M resistors do.

The prevent the bias supply itself from overloading the signal.

4. Is it a good idea to ground the unused input (pin 4, marked "Z")? I've heard that you should "always" ground unused inputs on CMOS chips.

Maybe, maybe not. That "always ground unused inputs on CMOS" advice is true enough - for digital inputs, not analog switch inputs. This is because the input impedance of the digital switches is so very high that the local radio stations and miasma of power-line voltages in the air can be picked up as inputs and cause the most strange results. In this case, the Z-section pins are analog input/outputs. There is either a very open connection (giga-ohms) or a few-hundred ohms between the three "Z" pins. By the way, all three "Z" pins are both inputs and outputs. Switching the local radio stations to themselves or not with a few hundred ohms is immaterial to what the other pins do.

But yes, with CMOS *logic* inputs, they must always be terminated in either a valid high or valid low.

Just FYI: I'm looking into using this CD4053 chip so I can do both momentary and latching bypass on a tremolo effect. I want a latching switch to turn the effect on and off, and a momentary switch that temporarily reverses the state. (So, if the effect is latched on, the effect would momentarily turn off. If latched off, it would momentarily turn on.) I've drawn up a circuit that uses two momentary SPDT switches, each of which controls a NAND latch. Then I feed the latch outputs to an XOR gate, which will run to the CD4053 to turn the effect on or off. (I'll also use the XOR output to turn an LED on and off.) It's a lot of circuitry (three digital ICs, plus resistors and capacitors), but I plan to put it all into a 1590BB; I think it'll all fit.

Good luck!

[D.C.]

Thanks for the quick reply! And from the author himself, no less...

I guess I need to sit down and wrap my mind around this "loading down" concept, as well as the idea of a "low-impedance" signal. That seems to be the key to understanding these bias resistors -- and I would like to understand it. I've even just finished an intro course in analog electronics, and these concept still don't quite "click."

One more question. Any suggestions on the value for the resistors in the voltage divider? Clearly they need to be equal (in order to get half the voltage), and as always there's a compromise between preventing "loading down" (lower resistance is better) and not wasting current (higher resistance => less current dumped to ground).

[R.G.]

I guess I need to sit down and wrap my mind around this "loading down" concept, as well as the idea of a "low-impedance" signal. That seems to be the key to understanding these bias resistors -- and I would like to understand it. I've even just finished an intro course in analog electronics, and these concept still don't quite "click."

It's a subtlety that's not appreciated enough. An idea voltage source is one that produces the specified output voltage NO MATTER WHAT LOAD IS ATTACHED. So a 1Vac ideal voltage source can drive a 1M resistor and a 1 micro-ohm resistor equally well - the current in the first case is 1uA, and in the second case one MEGA-amp. The output voltage is still one volt.

Of course, there are none of these in the real world - which, I've been told is a special case, albeit an important one    - and so we have to look at what real volltage sources look like. In most cases, we can model real voltage sources as an ideal voltage source dirtied up and dumbed down with external parts that make it non-ideal. The simplest of these is that there is a clot of resistors, inductors, and capacitors in series after the ideal voltage source. This lets you produce real-world sag and inability to drive loads.

EEs generalize all voltage sources as an ideal voltage source with something stuck in series with it. An ideal voltage source is then just a real world voltage source with a series resistance of zero.    That is a LOW impedance voltage source. Modern audio amplifiers have "damping factors" in the 100s. "Damping factor" is a way of saying " has a 1/damping factor lower impedance than the speakers it drives", so an amp with a DF of 100 driving an 8 ohm speaker has an equivalent internal impedance of 8/100 = 0.08 ohms. That's a low impedance source.

A guitar pickup is a coil of one to a few thousand turns of hair-fine wire around a ferromagnetic core - an inductor! The wire typically has a DC resistance of 4K to 18K, but an inductance of 1 henry to 4 henries. Under 20K isn't a particularly low impedance, but 2 henries is. Consider that the impedance of a 2H inductor is Zl = 2*pi*F*L,
so at 1kHz, it's 2*3.14*1000*2 = 12560 ohms; still not bad. But at 10K, it's 125,600 ohms. That's not only a high impedance, it's a frequency-variable high impedance. If the input impedance (loading) of an amplifier driven by that was only 120K, you'd lose half your 10K signal but only 1/10 of your 1K signal, so the tone would just get dull. And that's what really happens.

To keep guitars from sounding dull, amplifier makers have used 1M or over as a relative standard for imput impedance, to keep exactly this "tone sucking" from happening.

Capacitance is worse, as a capacitive load gets worse as frequency goes up. A cable from guitar to amp that's 50pF per foot and 20 feet long is 1000pf. At 1K, that's
Xc = 1/(2*pi*F*C) = 159,236 ohms, which isn't that bad compared to the guitar pickup's 12.5K there, but at 10kHz, the cap is loading the guitar with 15,924 ohms to the pickup's 125,600 ohms, and now you're losing 9/10 of your 10K signal to the capacitive loading.

Given that the poor guitar signal is going to be rabidly loaded by everything in its path, the bias resistors need to stay out of the way as much as possible. And that's why they have to be high resistance values.

One more question. Any suggestions on the value for the resistors in the voltage divider? Clearly they need to be equal (in order to get half the voltage), and as always there's a compromise between preventing "loading down" (lower resistance is better) and not wasting current (higher resistance => less current dumped to ground).

Oddly enough, there's a whole article or two on bias networks at my web site - geofex.com.  See http://www.geofex.com/circuits/biasnet.htm

The bottom line is that the parallel combination of the two resistors has to be less than 1/10 of the DC loading attached to them. They have to be bypassed to signal ground with a capacitor that's big enough that the cap is less than 1/10, and preferably less than 1/100 of the AC impedances attached to them.

[D.C.]

Thanks for that explanation. Definitely going to mull that over for a while.

Also, thanks for the link on biasing. Would you mind checking a bit of math for me?

Page 5 of this datasheet for the CD4053 (http://members.shaw.ca/roma/4051-53.pdf) says that the "Quiescent Device Current, I_DD Max" is 10 uA at 25 degrees C, for V_DD = 10 V. So, we need at least ten times that going through the voltage divider, which is 100 uA. By Ohm's law, R = (9 V)/(100 uA) = 90k, or, for each resistor, 45k. (Maybe use a 39k, for the next-lowest standard value.) That seems fairly high; I'm wondering I did something wrong. But I guess that could be reasonable; if the CD4053 isn't drawing very much current, the voltage divider can use larger resistors.

I couldn't dig up anything on your website about capacitors for biasing, but I think I'll just stick with the 47uF cap that you specified.

As a side-note, I'm beginning to second-guess whether this will all fit into a 1590BB. I just finished working out a veroboard layout for my NAND/XOR/Demux switching circuit, and it's 13 rows x 30 columns -- even bigger than the tremolo effect circuit that I want it to control!

[R.G.]

Page 5 of this datasheet for the CD4053 (http://members.shaw.ca/roma/4051-53.pdf) says that the "Quiescent Device Current, I_DD Max" is 10 uA at 25 degrees C, for V_DD = 10 V. So, we need at least ten times that going through the voltage divider, which is 100 uA. By Ohm's law, R = (9 V)/(100 uA) = 90k, or, for each resistor, 45k. (Maybe use a 39k, for the next-lowest standard value.) That seems fairly high; I'm wondering I did something wrong. But I guess that could be reasonable; if the CD4053 isn't drawing very much current, the voltage divider can use larger resistors.

Your math is OK, but the total current to worry about is the current that is taken from the middle of the bias voltage divider resistors, not the Idd of the CMOS chip, which is in parallel with the whole divider.

That leaves you with the problem of calculating how much current all those bias resistors pull out of the middle of the voltage divider resistors. It's not much, even more not much than the Idd of the CMOS chip. Each biasing resistor leads from the point of Vbias to a point on the CMOS chip that's either as open circuit as the CMOS can make it or at the same Vbias voltage. So the DC currents in those bias resistors are only the leakage from the CMOS switched pins to Vdd or ground, and this is very small indeed. Worse yet, it's quite difficult to figure out whether the leakage is up to Vdd or down to ground if it's not zero, so the currents may tend to add or cancel.

This leads to the normal condition about making a bias string: the resistor values are somewhat arbitrary, because you can usually only estimate the currents going in and out of the resistors, not calculate them.

Welcome to real-world engineering.    You almost never know all the values you need to calculate an answer in closed form. Good engineers make good guesses based on experience and intuition, and admit both that they're guessing and that they could be wrong, and know roughly how wrong they might be. Mediocre engineers make less-good guesses, and usually don't admit (or know!) that they're guessing. Poor engineers get fired when the errors are discovered in the field. Boutique/tweako pedal sellers call their mistakes "features", or label that knob "Ugly OK". 

I couldn't dig up anything on your website about capacitors for biasing, but I think I'll just stick with the 47uF cap that you specified.

The cap is for the AC currents. Big is good. the minimum size is that which is much less (i.e. < 1/10) the bias resistors, but that doesn't account for the AC currents.

47uF is a good starting point.