Stacking JFET Questions - Mixing & matching Fets and adding diodes

[Twhjelmgren28]

Hey all - been a while since I've posted.  Still very new to this but I do have an Axis Fuzz Face and a simple JFET clean boost under my belt.  I recently stacked 2 JFET amplifiers (essentially based on the below schematic) to make an overdrive.  I just have a few questions as I go.  I apologize but I don't have the actual values drawn up in a schematic yet but I was hoping to get some general info. 



1a. I basically used the N-channel JFets I had lying around and was hoping to come up with something that worked.  Turns out I actually really like the sound but it took a ton of tweaking - when stacking JFets, is it better to have 2 matching (e.g. J201 amplifer into a J201 amplifier)? 

1b. Or would something on the datasheets give a hint at what may work well with certain things?  For example, would putting a JFet with a maximum voltage rating of 40 clip more if it were going into a JFet with a maximum voltage rating of 30?  Or is it possible to test the gain with a multimeter (I've done this with BJTs - is it the same process?)?  The essence of this question is if it's possible to get a general idea of what will be louder or clip more.

1c. Is it possible possible to mix JFet stages with BJT stages?

2. I learned the hard way that when changing the source capacitor, the resistor nearly always has to change to get to an optimum sound and gain level for each stage.  Does this generally just require a ton of tweaking or is there an equation or something that will get me there faster?     

3a. If I were to add clipping diodes to the circuit would it be best to do it between stages? 

3b.  Could I mix and match diodes or is it better to use 2 of the same component? 

3c.  Would I need to add any caps or resistors (in general) b/f or after the clipping diodes?  The reason I ask is once I got this all breadboarded up, I threw on a green LED and a 1N4001 between the stages (one oriented positive to ground and the other negative) and I completely lost the signal.  I tried adjusting the trim pots connected to gate at each stage but got nothing...


Thanks in advance.  As you can see, I have a ton of questions but really want to understand what is going on.  I've searched for these specific questions here and elsewhere and have been unable to find definitive answers.  I'm guessing some or a lot of these questions may be dependent on the situation.  Any help is appreciated however.

Also, I may have more questions related to this in the future.  Thanks!

[antonis]

To make long story short..

1a. Matched JFETs are for utopia lovers..
(it's better to face the previous one as a single/independent signal source for the following one..)

1b. JFETs doesn't exhibit current gain..
(analogous/useful term for them is transconductance g_m = (ΔI_D/ΔV_G)
Different maximum voltage ratings have nothing to do with signal clipping (due to high gain) as far as power supply voltage is equal or lower than the lower rating..

1c. Yes..(and vice versa..)
(you can take advantage of FET's high(er than BJT) input impedance & BJT's high(er than FET) gain..)

2. Capacitor value should be much larger than that of Cut-off point (-3dB) at frequency f = 1/(2π*R*C), where π = 3.14, R in Ohms & C in Farads - for an almost constant gain over the frequency range of interest..

3a. "Best" is a term of not enough data..

3b. "Better" follows "Best" data validity required..

3c. A cap in parallel with clipping diodes "smooths" clipping corners..
A resistor in series limits current and also raises clipping threashold (depending on it's specific placement..)
Signal lost could happen due to various causes..
(e.g. no current limiting resistor, hence significanlty overloading Drain.. - you actually short Drain to, by V_fvd off-set, GND)

P.S.
A complete schematic with item values should be more discussion helpful..

[Twhjelmgren28]

Thanks for the info antonis!  Super helpful. 

I'm going to do a few searches on transcondunctance.

Regarding your response to 2, is there anything I could read further regarding the subject?  I get the math equation in it's simplest form - being I can use it to calculate something but I don't completely get "cut-off point at frequency" and what that means. 

EDIT:  In looking that equation up - I understand how to use it to calculate a corner frequency for a R-C filter - how does that work in conjunction with the Jfet and what Rs and Cs to use?

Also, I'll try to get a schematic up here soon so I can ask more specific questions related to the circuit I have breadboarded (those questions mostly being related to diodes and filters). 

Thanks again!  Truly appreciate it.

[Rob Strand]

when stacking JFets, is it better to have 2 matching (e.g. J201 amplifer into a J201 amplifier)? 

Stacking JFETs like that doubles the current and the transconductance. It looks exactly like single but different JFET  (The IDSS and yfs0 double.  These are parameters you will see on a datasheet that make one JFET different to another. Another parameter is VGS_off which is the one you usually match.)

[antonis]

Regarding your response to 2, is there anything I could read further regarding the subject?  I get the math equation in it's simplest form - being I can use it to calculate something but I don't completely get "cut-off point at frequency" and what that means. 
EDIT:  In looking that equation up - I understand how to use it to calculate a corner frequency for a R-C filter - how does that work in conjunction with the Jfet and what Rs and Cs to use?

It works the same way as in BJT Emitter degenerated amplifier..
(you can search it using something like above underlined description..)

In breef:
We sometimes place a resistor between Emitter(Source) and GND to more accurately set bias needs (Collector/Drain current, Gate-Source voltage, etc.) and also have an amount of negative feedback but that results in lowering amp gain (which is R_C/R_E or R_D/R_S) so we want the lowest possible resistor value for the higher affordable bias variation..
Instead of messing with not always convenient compromises, we by-pass Emitter(Source) resistor with a capacitor (whose reactance is ideally(*) zero in AC) so we have establish our DC requirements and also have obtain the maximun amp gain..
(which gain should be considered as R_C/r_e in case of BJT or g_m*R_D in case of FET - r_e can be calculated from 0.025/I_C and g_m can be found on datasheets..)

(*) In real world, capacitors exhibit frequency (f) variable resistance (capacive reactance) of Z_C = 1/(6.28*C*f)..
Given that, we don't completely by-pass Emitter(Source) resistor if we don't do it with an infinite value capacitor..
Such a capacitor should require infinite room and infinite money so we shake hands with our wallet for an impedance value of, 10% say, of Emitter(Source) resistor value, 91% effectively by-passing it..
If you face that RC combination as a voltage divider, corner frequency is the point at which R & C values are resistively equal so we have a 50% domination..
The higher the capacitor value (provided a fixed resistor value) the lower its reactance hence the more effective resistor by-passing resulting in higher gain..
With the formula of cut-off point you can calculate actual capacitor AC resistance for a given frequency and place it in parallel with Emitter(Source) resistor to find the total AC effective resistance and deside if the gain satisfies you..

P.S.
I don't further refer to partially by-passed Emitter(Source) resistor and the reason for that 'cause I've already deviate enough from "in breef" mean.. 

[Twhjelmgren28]

Thanks again for the response.  This stuff is getting confusing! 

So I ended up finding Small Bear's write-up on biasing JFets in which he charts drain current vs. gate voltage and then chooses a current that is about halfway to the cutoff point.  Is this how you guys figure out the right resistor each time you use a JFet in this manner?

I'm talking specifically about this:

http://diy.smallbearelec.com/HowTos/BreadboardBareAss/BreadboardBareAss.htm


Again, hopefully I'll be able to get a schematic up soon and I can ask about diodes and stuff.

[antonis]

Is this how you guys figure out the right resistor each time you use a JFet in this manner?

I personally use more "conservative" methods (design according to general rules - with unavoidable final trimming due to uncertainity and wide spread of critical parameters..) but Small Bear's suggestion is THE way for accurate (in the mean of closer to specific task) results..

P.S.
In general, the "depth" of messing up with FETs is reverse proportional to the "tightness" of task margins..

[R.G.]

You're not alone in your wondering about how to bias/etc. JFETs. The pro electronics industry just about quit using them entirely, not least because they are so widely variable, and the techniques to eliminate the inherent variations on them also eliminate a lot of their available working range as well.

Bipolars are also highly variable, but the circuits to get them all harnessed up and predictable without hand tweaking every board is much simpler to do, and doesn't sacrifice the working range of the device nearly as much.

The more-predictable ways of using JFETs tend to combine them with bipolars in an inverting-gain feedback circuit that allows the JFET's own biasing to not matter so much.

Even then it doesn't always work so well. I did a repair PCB for Thomas Vox amps that replaces the JFET-input versions of those amps, completed down to the input JFETs. These use a JFET/PNP compound with negative feedback. It >>still<< requires hand tweaking of at least one resistor to get the finished circuit roped back into the right bias point. I think my next iteration of that PCB may just include spaces for trimpots for the pertinent resistor in all three preamp input circuits.

[antonis]

Thanx a lot R.G...!!

(I couldn't scare Twhjelmgren28 enough all alone..) 

[Twhjelmgren28]

Haha - got it.  Thanks to all of you! 

I was hoping there was some magical plug and play equation but I'm cool with just tweaking with stuff.  I'll probably also try out Small Bear's tutorial at some point as well.