Diaz Square Face Fuzz/NPN Fuzz Face vero layout clarification??

Started by BenjaminLucas, May 12, 2020, 06:55:37 AM

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BenjaminLucas

Hi everyone. I drew an original Vero layout for a clone of my Diaz square face fuzz (basically an npn fuzz face). I wired it up and and so far its been plagued with it doing nothing but a barely there gasping raspy dull fart, not so much fuzz. I looked at the usual suspects including cap and transistor polarity and bridged traces/solder whiskers and the lot but couldn't source a thing. It powers on and bypasses fine. I double and triple checked my layout and wiring, then did so again and couldn't find a thing wrong in regards to it in relation to my original square face and even any other fuzz face schematic really. Its housed in an old 8mm film canister so I took that into account when checking my grounds and couldn't see anything missing. I am using nte123ap silicon transistors (the square face used these for the silicon option), and germanium 2n2222's. The 2n2222's sounded great omegle discord xender in a tone bender I recently had debugged thanks to the folks here and figured they should work. The square face fuzz I had used nte103 germ transistors and have some on order now. But for now I'm cross referencing both sets of transistors. I replaced the 8.2K with a 20K trimpot (dont have any 10K's) to bias it but for some reason it still sounds the same whether its the 8.2K resistor or trimpot, and I can't dial in it at 4.5V on Q2's collector (and do tell me if I'm doing It wrong as I'm still rather green). The trim just stays at around 9.3X volts.

So in saying all that I can't really figure out what's wrong aside from replacing components now (have ordered some nte103's like the original to try just in case but I dunno). It feels like its a grounding issue but everything looks great. It's kind of frustrating as the circuit seems dead simple but is just not all there.

I am near certain there's no issue with my layout but then again I said the same about my last build problem and was glad to stand corrected by some good folks here. So I do hope there's something obvious that I am overlooking and somebody else may catch it. I'd be very much grateful for any help to hopefully get this thing working as it should.

Attached are my Vero layout and my voltages for Q1 and Q2 of the nte123ap's and 2n2222's I'm using.

Q1: 2n2222germ npn
       120ufe
C:    1.22
B:     0.60
E:     0.00

Q2: 2n2222germ npn
       140ufe
C:     9.36
B:     1.22
E:     0.77

Q1: NTE123AP silicon npn
       170ufe
C:  1.18
B:  0.59
E:  0.00

Q2: NTE123AP silicon npn
       150ufe
C:  9.38
B:  1.18
E:  0.77

antonis

ALL Collector voltages out of order..

Plz post a schematic of your particular circuit toghether with vero layout AND buit (populated) board..

Or better, use Jack's calculator: http://www.muzique.com/lab/fuzz_face.php for verifying proper bias voltages..
"I'm getting older while being taught all the time" Solon the Athenian..
"I don't mind  being taught all the time but I do mind a lot getting old" Antonis the Thessalonian..

willienillie


PRR

There's a 1k resistor or pot from Q2 E to ground.

Except MANY MANY times it gets forgotten.
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