Diodysus Alpha Vero

[kierkegaard]

alright my friends, ready to build this thing onto vero wondering if some patient soul might take a quick look and help me make sure i have done it right



the big oval is the SP8T  and the pots 1/2/3 correspond with the pots in the schematic left to right

schematic here

[antonis]

If I remeber correctly, your schematic was (and remains) wrong..!!

You didn't move B10k pot wiper on JFET's Source (upper R4 leg), as pointed out in another thread.. 

[kierkegaard]

ah yeah, hello!

i must have uploaded the wrong schematic becasue i did rectify it

its also fixed when converted to vero, you want me to upload the other so its easier to check?

[antonis]

No need for that..

But need for wires/strips naming (+9V, GND, OUT, IN etc) stands..

[kierkegaard]

aaah yes, always forgetting something! thanks for looking

[antonis]

Eeehmmm..

You know horizontaly placed caps and resistors need cuts underneath their body..
(or else, they're shunted by shorts..)

[kierkegaard]

ah no i didnt consider that, but of course it makes perfect sense, nice one

all good otherwise do you reckon?

is there a good guidline as to what fits in certain size pedals, i guess i need to buy an empty pedal box for this

[11-90-an]

is there a good guidline as to what fits in certain size pedals, i guess i need to buy an empty pedal box for this

You can just search the dimentions of pedal enclosures and estimate from there or make a plastic pedal simulator...
Basically my drill isn't strong enough to cut through the aluminium 1590Bs (though I do have 3 of them...) it CAN cut through plastic. So first you measure the dimentions of the pedal, cut some plastic and drill some holes, hastily put some glue gun and voila!

[POTL]

The diagram is drawn with an error.
Potentiometer + 10uf capacitor connected to wrong pin of R4, they should be connected between transistor and resistor, not between resistor and ground.
Check it out on your veroboard.

[antonis]

The diagram is drawn with an error.
Potentiometer + 10uf capacitor connected to wrong pin of R4, they should be connected between transistor and resistor, not between resistor and ground.

If I remeber correctly, your schematic was (and remains) wrong..!!
You didn't move B10k pot wiper on JFET's Source (upper R4 leg), as pointed out in another thread.. 

[kierkegaard]

The diagram is drawn with an error.
Potentiometer + 10uf capacitor connected to wrong pin of R4, they should be connected between transistor and resistor, not between resistor and ground.
Check it out on your veroboard.

haha yeah as Antonis points out, that was already brought up and i fixed it but uploaded the wrong schematic, its fixed on the vero

what im after is to check if ive converted the schematic to vero properly (minus the R4 mistake on the schematic)