Deluxe Big Muff Pi (1978) - selecting a JFET for the compressor section

[aion]

In the factory schematic for the '78 Deluxe Big Muff (which is an op-amp Big Muff and a Soul Preacher compressor in parallel) there is a note about selection of the JFET. Here's the schematic:



It's a little hard to read, but on the left side, the Q1 JFET is specified as a a 2N4302, and the note says it should have a Vp of -2.75V +/- 0.25, and an Idss of 2.25mA +/- 0.75.

I measured the JFET (house numbered F2818, which is a relabeled 4302) in an original Deluxe BMP with a Peak Atlas DCA75. The Vgs(off) was -2.22V and the Idss was 2.57mA. So, allowing for differences in testing conditions and methods, that's probably within spec.

Here's the predicament: I can't find any modern JFETs that test within that range for both Vgs(off) and Idss. (I mean actual tested units - JFET manufacturing is good enough these days that the characteristics are much tighter together, so even if the datasheet looks like it'll work, you could test 10,000 of them and not find a single one that fits what you need.)

Here's what I do have - values based on personally testing batches of 10 to 20 new production SMD of each type from Mouser:

J202 (same process 52 as 2N4302, and the datasheet is pretty much identical)
Vgs(off): -1.82V avg
Idss: 2.53mA avg

MMBF5485
Vgs(off): -2.38V avg
Idss: 6.55mA avg

2SK208-GR
Vgs(off): -2.07V avg
Idss: 4.00mA avg

The J202 is close on IDSS but low on Vgs(off). The 5485 is great on Vgs(off) but high on Idss. The 2SK208-GR is partway in between, but still outside spec for both.

So, my questions:

1. Perhaps the one that should have been asked at the very top before I did all this research, but: how important is the spec from the schematic? The Soul Preacher is pretty close to the Orange Squeezer, which is very tolerant of different JFETs - but the JFET itself is the place where the two circuits differ the most.

2. If you can't have both, is it better to meet the Vgs(off) spec or the Idss spec? (And is it better to go over or under?)

3. Are there any circuit tweaks that could be made to make it better fit one of the available JFETs, like in the portion that drives Q1's gate?

[Rob Strand]

One way to buy some freedom is to re-scale the resistances R18 (220k) and R19 (270k).    They only need to be some scaling factor larger than the rds_on of the JFET.      You could decrease the values and keep the R18/R19 ratio to allow lower rds_on JFETs to be used.    That way you only need to focus on getting a similar VP.

A measure of the JFET resistance is rds_on,

    rds_on  ~  VP / (2*IDSS)

If you plug the values on the schematic into that you get rds_on = 611 ohms.   That's actually pretty high compared to most JFETs.     The J201 is the most common JFET with a high-ish rds_on.

J202, rds_on = 360 ohm, Vgs(off): -1.82V avg

MMBF5485:  rds_on = 182 ohm,  Vgs(off): -2.38V avg

2SK208-GR: rds_on = 259 ohm,  Vgs(off): -2.07V avg

The closest VP is MMBF5485.    So you rescale R18 and R19 by a factor of (182/611) = 0.30, so about 68k and 82k.

It's probably worth measuring VP, IDSS, rds_on to make sure it is in the same ball-park as the datasheet.

As far as modifying the circuit to cope with a different VP you would need to look at the circuit more closely.

but: how important is the spec from the schematic?

It probably won't stop it working.  I suspect is more about meeting published specs in their brochures.

[aion]

Thanks, this is (as usual) very helpful. So what I'm hearing is that the Vgs(off)/Vp should be kept as close as possible to within the specified range, and those two resistors should be scaled accordingly based on the calculated difference in Rds(on) compared to the target range specified in the schematic.

Is there anything "more ideal" about the JFET they chose for the application, or in your opinion did they just design around the JFETs they had available, and that type happened to have an unusually high Rds(on)?

[Fancy Lime]

Idss should be bigger than 0.1 mA, beyond that, it should make little to no difference in this circuit, if I'm not mistaken. That's because R18 limits the current that needs to be disposed of by the JFET. So I would not fret about Idss. Furthermore, the circuit is a feedback design, which means it compensates for the Vgs(off) characteristics of the JFET to some degree. A smaller absolute value should certainly be unproblematic. It should just change the sensitivity a bit.

TL;DR Any of the ones you list should work just as well as the original. I think. Please, someone correct me if I'm wrong.

Andy

[Rob Strand]

Thanks, this is (as usual) very helpful. So what I'm hearing is that the Vgs(off)/Vp should be kept as close as possible to within the specified range, and those two resistors should be scaled accordingly based on the calculated difference in Rds(on) compared to the target range specified in the schematic.

Yes, that's it.

Is there anything "more ideal" about the JFET they chose for the application, or in your opinion did they just design around the JFETs they had available, and that type happened to have an unusually high Rds(on)?

I'm not sure why they chose the high Rds_on JFET.   To me a lowish Rds_on lets you use lower R18/R19 and and that would be better for noise.

I had closer look this morning.

The R29 (100R) should be wired to -5V, it's not really spelled out.   R29 and C13 filter the supply and the voltage on C13 is about -5V.

One thing that stands out is the 5V supply.    When the compressor compresses it pulls the gate towards zero volts via Q2.  When the compressor releases C12 will discharge through R28 and that sets the gate voltage to -5V.   Clearly the JFET VP needs to be in the window 0V to 5V.   You can imagine if the VP was 1V  there would be a bigger delay before the cap C12 could charge from 5V to 1V and the JFET did anything.    When the compressor releases it would cut out early.    If on the other hand VP was say 4V the delays effect on the attack and release times would reverse.    A VP of 4.5V would mean the JFET will not be able to turn off for a quite long time.  So in short the JFET VP has an effect on both the attack and release times.   The compressor also has a delay before it cuts it.

My feeling is it will probably work reasonably close to the original with JFETs VP 2.5V to 3.5V  as the charging and discharging of the cap wouldn't be affected too much.   You probably want to avoid using a low VP as that's going increase the delay before the compressor can act and that's why I'd err on VP's more than 2.5V.

It is possible to play with R27 and R28 to adjust the attack and release times.    Setting the turn-on delay would need a bias pot on the gate.

The attack release times look quite long, it's almost a leveller, so maybe people might want to play with those times anyway.