Diode-biased SRPP with LND150 dep-FET

[mdcmdcmdc]

Hi folks,

I have a few LND150 depletion fets on hand and thought I'd give them a go in an SRPP configuration on the breadboard. I've had decent luck diode-biasing these devices in the past in simple gain stages, and came across forum user iainpunk's schem for a diode-biased SRPP in an older thread:



So far, so good...

I sub'd a 470K resistor for the 500K, and grabbed two 1N5817s to start with...

I powered up the breadboard and the first LND150 got scorching hot, so I assume something is profoundly not working!

Just curious if anyone has had luck using LND150s in this configuration, and if so what diodes you selected?

Any guidance for voltage ballparks would be appreciated as well...

Thanks in advance!

[Rob Strand]

First check your pinouts.

In general VGS_off for the MOSFET can vary quite a bit.   Your specific devices might have a higher Vgs_off so with the single Schottky diode drop they might operating at higher currents.   You might be able to back off the current by changing the diodes to silicon.   That's a fairly coarse change.   Another way, which is tweakable, is to add a resistor in series with the Schottky but that could drop the gain of the circuit if the resistor value is relatively high.

Another angle is the circuit is oscillating and you might need to add some resistor and small caps to tame it.

Actually looking at the datasheet the parts should stay at a low current over a wide range of gate voltages.  Maybe it's the pin out.

[mdcmdcmdc]

oh lol, false alarm, I had too many tabs open and got the pinout backwards. 

One trouble shot, at least...

It's now passing signal, but basically giving me about unity gain between input and output - i'll mess around with diodes to see where that takes me.

Any thoughts as to what I should be looking for, as far as voltages on the two devices goes?

[Rob Strand]

oh lol, false alarm, I had too many tabs open and got the pinout backwards. 

Cool.  I actually just looked at the datasheet and got the same conclusion!

[Rob Strand]

Any thoughts as to what I should be looking for, as far as voltages on the two devices goes?

There's not much to check.  The voltage drops across the Schottky's is going to be about 0.25V.   The center point between the two MOSFETs might be around Vcc/2 - not guaranteed but perhaps close if the parts are from the same batch.

[mdcmdcmdc]

Swapping diodes doesn't seem to have much/any effect on the output; the 1N5816s I picked at random to start with seem as loud or louder than anything else (though it was nice to see the LEDs I tried light up in one position...).

Diode biasing is pretty mysterious to me... I tend to just swap them around until something good seems to happen. I'll give it a go with resistors... this is the only similar circuit I found in a quick search:

[mdcmdcmdc]

That mic-pre schematic above sounds quite nice with a single-coil'd electric guitar as a simple gain stage with the LND150 and R2/R3 increased to 5.1K. Anything much higher value than that and the low notes starts farting out in an unpleasant way...

[Rob Strand]

Diode biasing is pretty mysterious to me... I tend to just swap them around until something good seems to happen. I'll give it a go with resistors... this is the only similar circuit I found in a quick search:

It's not a big deal.

When you use resistors the gate to source voltage is set by the current through the resistor (vgs = ID * Rd).   However the JFET will produce a given current for a given vgs.   The self biasing scheme with a resistor finds it's own place so both vgs and id match the constraints set by the part and the resistor.

You can see it here, the slope of the line is the source resisitor,  The two curve are for different part, which could for example be due to the normal production spreads in JFETs of the *same* part number,


What is clear is with a reasonable choice of resistor the bias point isn't too bad for either JFETs.   It's finds a good home in both cases.  That's the advantage of the resistor biasing scheme.

When you use diode is simple sets vgs to a fixed voltage, the diode drop.   It doesn't matter what current flows through the diode or the FET the vgs voltage is fixed.    For the graph I posted, if we had two silicon diodes with a 1.3V drop, then the (red) bias line would be a vertical line at -1.3V.   You can see that might be OK for the lower JFET but for the higher JFET the bias point is way up near 12mA.    It's fairly clear  this biasing scheme doesn't naturally find it's own home as well as the source resistor scheme.   In other words you have to be a low more careful about matching the diode drops to *specific* JFET parts you have.   When you consider JFET tolerances, the diode bias method might not be good choice.

The advantage of the diode scheme is the diode impedance is low and doesn't affect the gain much.  In the resistor scheme large source resistors will reduce the gain.   That can only be counteracted by bypassing the source resistor with a cap- as is shown in your second JFET schematic.

[Rob Strand]

That mic-pre schematic above sounds quite nice with a single-coil'd electric guitar as a simple gain stage with the LND150 and R2/R3 increased to 5.1K. Anything much higher value than that and the low notes starts farting out in an unpleasant way...

If the voltage drop across the source resistors is too large you can get loss of swing.   You can also get swing issues if the JFETs don't bias to the middle.   That's where the mu amplfier connection is sometimes better,

https://www.muzique.com/amz/mini.htm

The voltage on the gate of the top JFET sets the voltage between the two JFETs.

[mdcmdcmdc]

Turns out I had an errant jumper or a bad spot on the breadboard... this all seems to be working relatively ok now.

[Rob Strand]

I realised after looking at the breadboard again that I had a jumper in the wrong place, and this is actually what's on the board and sounding quite decent:



The wonky jumper would also explain why the diode version wasn't working properly (i'll go back and try that again).

You might find that configuration isn't much different to just a single drain resistor (and no upper MOSFET).   Just tune the resistor to get the same drain voltage on the lower MOSFET as you have now.

[mdcmdcmdc]

The upper fet seemed like it was doing... something? but honestly after looking at it for a second time, yeah, it really doesn't seem like it would be any different than a single mosfet (hence the edit)...

[Rob Strand]

The upper fet seemed like it was doing... something? but honestly after looking at it for a second time, yeah, it really doesn't seem like it would be any different than a single mosfet (hence the edit)...

If the top of the side of the drain resistor is at, or almost at,  the supply volt then the top MOSFET isn't going to do much.

The circuits with the top MOSFET tend to have more gain than the drain resistor versions.   The top MOSFET looks more like a current source, which has a high impedance.

[mdcmdcmdc]

Tinkered around with it for a while last night and it seems to work to some degree; the 1n5817 was the best of what I have on hand but still sounded a bit sputtery, so I'll grab some BAT46 and try those - they've worked well to diode bias LND150s in single configs.

Interestingly, a pair of ferrite beads also worked about as well as the 1n5817.

[amptramp]

People should note that the original post was not an SRPP design but the Rene Schmitz design of reply #5 is SRPP.  In the SRPP design, the upper transistor is biased through a source resistor and and the output is taken from the source but the signal to the upper gate is taken from the lower drain.  If you follow the signal, the lower gate going more positive drives more current through the lower JFET and the same current goes to the upper JFET.  Since the current is increased, the upper JFET gate is driven more negative and this tends to shut the upper JFET off.  If the source resistor for the upper stage is equal to the reciprocal of the upper JFET transconductance, the amount of upper gate drive reduces the upper transistor current by the same amount the lower transistor increased it.  In reply #5, this is 1 K so it is the correct value for an upper transistor transconductance of 1000 micromhos.  If you had 2000 micromhos, the correct resistor would be 500 ohms.

The difference in current between the upper and lower JFET has to go somewhere, so the SRPP stage needs to be loaded or it will swing between the upper and lower rails.  This could be the basis for a good fuzz - have an additional JFET stage as an output buffer and use a variable resistor from the output of the SRPP stage to ground.  At low resistance, the stage is linear.  At higher impedance, it limits, giving an effect similar to diode clipping but with a different flavour from the usual clipping diodes to ground implementation.

I would be tempted to build this circuit with Darlington transistors.  This would have well-controlled characteristics with enough gain that base current would be negligible.

[iainpunk]

hey, sorry for being late.

the design posted in the first post uses BF245 jfet's, and need to be somewhat matched in order for them to work. if its not matched, it severely lowers the gain and sometimes gates heavily. it also doesn't like to have its input overdriven, which makes some odd background noises in dying notes, cascading these doesn't make for a very good distortion, but it was in the chase of a resistor-less fuzz that i came up with using diode bias like that. i haven't had any luck with mosfets either, they wouldn't produce much gain either.

cheers