BBD supply voltage question

[Onion Ring Modulator]

This is a snip from AION's CE-2. I am experimenting with BBD chips for the first time, and I'm unsure on something.

Why is pin 5 of the 3207 labeled "VDD/GND"? Does that mean that the chip needs its own dedicated ground path? You wouldn't be attaching both supply voltage and ground to the same pin, would you?

Same with pins 1 & 7. Is this just telling me that we need separate voltage and audio ground paths?

Then pin 4 connects to pin 8 of the clock chip. Do I take that to man that the BBD is "feeding" the clock with its voltage?

This is probably redundant x1000 to the old pros, so apologies. Is there a page that explains all this on the web somewhere?

Thanks!


Edit: added power section from the same schematic for reference.

[Mark Hammer]

I've never really understood what all the subscripts after V stood for (bb, dd, etc.) but the outputs from pins 7 and 8 on a 3207 are referenced to ground.  On a 3007, those same outputs are refenced to V+.  The changeover from the 30xx series to the 32xx series necessitated that change.  If you look at any of the circuit diagrams of the original MN3007-based CE-2, you will likely be confused by that 56k resistor going to different places in each.

[PRR]

> This is probably redundant x1000 to the old pros

No, it IS confusing, even for folks who were there at the time.

The BBD comes out of digital chip processes; it is dynamic RAM re-rigged with analog buffers. And while we now think all PC digital runs on +5V and Gnd, for a while P-type MOSFET (PMOS) logic ruled (or was cheapest) (Intel), and this ran on GND and a NEGative supply rail.
https://en.wikipedia.org/wiki/PMOS_logic

Of course all polarity is relative, and "ground" is arbitrary.

[Rob Strand]

To answer the question.  Aion has created confusion.  There is a difference between *chip* pin labels and supply labels - they don't always agree.

The original CE2 used MN3007/MN3101 chips, which are PMOS.  For PMOS chips VDD pin is the more negative supply and GND (VSS) pin is the more positive supply.  Check out an old CE-2 schematic.  Chip ground doesn't connect to circuit ground.

The Aion version uses MN3207/MN3102 chips, which are NMOS.  For NMOS chips VDD pin is the more positive supply and GND pin is the more negative ie. looks more normal.

Here's perhaps what should be done:


For more details:
BBD Supply Labels

Labels in parenthesis are the pin labels given in the *chip datasheet*.
For these chips chip VSS is chip ground regardless of NMOS/PMOS
tecnology.  However Panasonic don't use VSS in their datasheets.

It is important to separate the labelling of the chip pin supply
labels and the circuit supply names.  PMOS circuits are
essentially positive ground devices but single supply circuits are normally
labelled according to negative ground conventions.


* CE2, CE2B, CH1

Chips:
- High voltage supply
- PMOS Technology
- VDD is a negative voltage ie.  GND in common ckt
- *** GND (VSS) is a positive voltage  ie. +V in a common ckt
- The last two follow from PMOS technology
  requiring a negative drain supply

Supply     +V              0V
MN3007   pin 1 (GND)   pin 5 (VDD)   ;output pins 7, 8 pulled-up to +V
MN3101   pin 1 (GND)   pin 3 (VDD)


* BF2

Chips:
- Low voltage supply
- NMOS Technology
- VDD is a positive voltage ie. +V in a common ckt.
- GND (VSS) is a negative voltage ie. GND in a common ckt
- The last two follow from NMOS technology
  requiring a positive drain supply

Supply     +V               0V
MN3207   pin 5 (VDD)   pin 1 (GND)   ;output pins 7, 8 pulled-down to 0V
MN3102   pin 1 (VDD)   pin 3 (GND)


* See also,
https://www.electrosmash.com/mn3007-bucket-brigade-devices
As far as VDD, VGG, VSS, VCC, VBB, VEE.   These always refer to power supplies or bias supplies.
VDD is the power supply for drains.   VCC is the power supply for collectors.
Whereas VD is the DC voltage at the drain, VC is the DC voltage at the collector.

The important thing is these labels don't imply a polarity of the supply.

The problem with PMOS and PNP circuits is VDD and VCC are the more negative voltages.  When you mix  PMOS and PNP with NMOS and NPN   you can't stick with VDD/VCC being the positive supply voltage.   That's where the the supply voltages should not be called VCC but perhaps should be just called +V and GND.   The use of VDD/VCC for the positive rail only works for NMOS/NPN devices.

[ElectricDruid]

> This is probably redundant x1000 to the old pros

No, it IS confusing, even for folks who were there at the time.

Completely agree. The polarity switch between the MN3007 and the MN3207 must have caused thousands of problems over the years. It's a right mix-up. Circuits that clain they can use either chipset invariably finish up with totally confusing notes about the two options. It's a nightmare.

[Rob Strand]

Completely agree. The polarity switch between the MN3007 and the MN3207 must have caused thousands of problems over the years. It's a right mix-up. Circuits that clain they can use either chipset invariably finish up with totally confusing notes about the two options. It's a nightmare.

It's confusing but it's not a "right mix-up" because the *chip pins* are actually named according to engineering conventions.

The problem is people read the meaning of VDD to be positive when it doesn't actually say that.  For most circuits VDD *is* positive but VDD doesn't carry a meaning of positive.

The naming of the pins actually carries extra information about the internal structure of the chip.  There's also an implication of what the ground pin is from the chip's perspective.  Connecting the chips ground on PMOS devices to the circuit's +V (which isn't) should be a warning that you need to have good supply bypassing on that chip because noise on the +V rail will inject noise.

If you want to avoid errors you can just name the pins +v and -v but then for some chips (ie. many chips) -v is ground.   But if you make always make -v ground then you still get problems.  For mixed signal chips you might need +v, gnd and -v and it makes a lot of sense to have gnd labelled.  And in the rarer case of chips like PMOS BBD's -v isn't ground at all.  You can't win by default, at some point you have to know what you are doing.

You can see TI use +v and -v for dual supply opamps,
https://www.ti.com/lit/ds/symlink/lm741.pdf?ts=1696640857243&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FLM741

But for a (sort of) single supply opamp like LM324 they are using +Vcc and -Vcc,
https://www.ti.com/lit/ds/symlink/lm324.pdf?ts=1696641196425&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FLM324%253FkeyMatch%253DLM324

And back in the day there we some opamps which had +VCC and -VEE.   Even the -VEE naming is a bit of a stretch.