Sub-osc with CD4013 chip issue

Started by snk, October 07, 2023, 09:47:10 AM

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Rob Strand

#40
QuoteIt's connected to IC8, pin1, so it's TP4, right?
Yes that the one.

QuoteOn the DIY site from Parasit Studio, !Q is also used :
https://www.parasitstudio.se/building-blog/cmos-workshop-part-3-octave-down
The 10k's alone are enough if the input signal truely has noise or glitches.   The 10k's can help very narrow glitches from ground bound or parastic effects.

Quoteso you posted THIS, but said you had changed it around the transistor. and then someone posted this
This circuit with the 100nF caps and 2k2 (which is 10k and 22n) between D and /Q can help when the input signal has the glitches.

Quotesee - the two transistor circuit takes a signal, inverts and inverts it in the schmitt [Rob et al - please correct me on that]. your original also doesn't invert the signal, but your modded version with collector connection will invert.
Yes, the (original) buffered and Schmitt version don't invert but a single transistor switch will invert.  I was thinking early on the phase isn't such a big deal for an octaver.

FYI, for the Schmitt version the resistor R60 + C5 doesn't look right to me.  The diode direction D2 looks OK.  I'd be thinking a resistor across the diode and the existing R60 replaced with a short.

Sort of like this, but a ground version instead of a +V version,  Which would then produce a narrow positive pulse.


Another thing: From what I can see the synth outputs swing +/-.   The circuit with the Schmitt-trigger is only single supply.   Powering the CD4013 from +/- V will get the swing but the voltage is too high.  You still need to get the clock pulse swing right and also make sure the Schmitt triggers at 0V, which it probably doesn't as is.   Anyway there's some incompatibilities.

Duck, thanks for keeping this thread rolling.
Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

duck_arse

well Rob, it turns out my flipping flopping has the same problem. I haven't finished building the circuit concerned: I had a cap to fix, but not the R as well.

https://www.diystompboxes.com/smfforum/index.php?msg=1257634


in my spray last night, I forgot to point out that the emitter driving the clock drives high and floats low, whereas the modding colector drives low and floats high. and the clock clocks on the high going, so that might be another of the things that might add to not working.

can't wait to hear about the proper connected +15 volts and pin 14, tho.
" I will say no more "

Rob Strand

#42
Quote from: duck_arse on October 13, 2023, 10:05:08 AMwell Rob, it turns out my flipping flopping has the same problem. I haven't finished building the circuit concerned: I had a cap to fix, but not the R as well.

https://www.diystompboxes.com/smfforum/index.php?msg=1257634


in my spray last night, I forgot to point out that the emitter driving the clock drives high and floats low, whereas the modding colector drives low and floats high. and the clock clocks on the high going, so that might be another of the things that might add to not working.

can't wait to hear about the proper connected +15 volts and pin 14, tho.
The cap to ground thing can work in some cases.  The final 470pF is quite a high value.  A resistor before the cap might allow for a smaller cap as it forms a proper glitch filter.  For the circuit posted in this thread with the 100pF cap trigger circuit a cap to ground won't work since the cap to ground will kill the trigger pulse.  The feedback R + C method is a little more deliberate and robust in the sense that it blocks any clock glitches for a defined interval after the initial clock pulse.

Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

ElectricDruid

Quote from: duck_arse on October 12, 2023, 10:52:59 AMit all follows from the circuit diagram. any form - pencil on paper is fine - but the circuit as you intend to build it. please.

+1 agree. This is a really good discipline to get into. For a long while I wondered why my circuits didn't work. Then I started actually recording the changes I'd made, and it rapidly became obvious why things weren't working!

You should have a *complete* schematic of what you're doing *before* you even try to build it. And once you build it and modify it *you make sure* to notate those changes on the schematic you printed out and had on your desk while you were building. You did do that, right?!? Ok, 'course you did! How could I doubt you?!?

This kind of discipline about documenting *exactly* what you have on the breadboard in front of you is *crucial*. *Thinking you know* isn't good enough, because you're almost cetainly wrong in some detail or other. So the only way to manage it is to be absolutely rigorous about recording the circuit as you modify it so you know what you have and what you're listening to.

HTH


PRR

Quote from: ElectricDruid on October 13, 2023, 09:34:51 PM...documenting *exactly* what you have...

"An old proverb says that 'the faintest ink is more powerful than the strongest memory.'"
  • SUPPORTER

Rob Strand

QuoteYou should have a *complete* schematic of what you're doing *before* you even try to build it. And once you build it and modify it *you make sure* to notate those changes on the schematic you printed out and had on your desk while you were building. You did do that, right?!? Ok, 'course you did! How could I doubt you?!?
It's also a good idea to add: a title, version numbers and dates on schematics and files.

Dates and versions is something missing from a lot of DIY'ers stuff.  If someone fixes something (eg. layout or schematic) it's hard to know what is old and what is new.   If you look at some threads on FSB threads the only thing holding the chronology together is the date of the post.  If someone quotes an old post with an old/obsolete schematic, or attaches an old version of the schematic, it screws up the chronology.  When thread gets to 20 pages it's painful to piece things together.

I pretty much write dates against all my handwritten notes and notes on the computer.   It makes it a lot easier to go back to something and re-assemble all the info. Writing the aim of what you are trying to do is very useful, also a summary which rolls-up what you have worked out so far (saves deciphering 20 pages of notes).

I've learn the usefulness of stuff over time.
Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

snk

Hello all
Thank you for all the wise words and advices  :icon_biggrin:
I was away for the weekend, but tomorrow I will go back to the drawing board and draw a schematic as advised, before drawing a veroboard layout.
I'm used to veroboards (I build them from verified layouts, and tweak a couple components to my tastes), so getting into schematics seems quite a steep learning curve, but it will obviously be a great occasion to learn and know what I am doing better :)

snk

#47
Hello,
I have drawn a schematic of what (I think) I want to build.
I took the Yves Usson schematic, added the 1k + 100nF cap to ground (to slow down the chip as advised), wired the transistor as common emitter (to suit modern CD4013 chips), and used the Q and !Q as advised.
As it is my first schematic drawing, it might feature some errors : I have checked it twice and twice again, but things get fuzzy pretty quickly when you're such a newbie :)
I hope it's not too ugly  :icon_lol:


[sorry for the somewhat blurry picture, I had poor light conditions and could not take the photo while being perfectly in front of the paper sheet]

snk

Quote from: duck_arse on October 12, 2023, 10:52:59 AMok. so a few things - your from the !Q is going to be opposite level of the original from the Q. it will clock the next stage different edge to the original [relative to the inputted signal], and the final output will also be opposite of the original.
This part is a bit technical, and I'm trying to get it right : when you write "opposite level", do you mean like "anti phase", which might create some PWM (taking a full, deep square wave, and converting it into a thin, nasal pulse sound)? Or is it something else?

duck_arse

yer diagram - on the B section, you have the slow down cap before the resistor. the resistor first against the !Q, then the cap against the D as in the A section. your level pot is at the very least odd, if not wrong. the hot signal at the pot top [CW], ground at pot bottom [CCW] and the volumed signal out from the wiper. I'm not sure the use for that extra 10k on the pot, either.

the Q or !Q is probably me overthinking things. it may not matter at all. it won't/shouldn't get all PWM, or even PMU, on you.
" I will say no more "

duck_arse

and yes, I now see that's the way that pot was originally. it isn't the usual way to do volume - it perhaps is providing a constant loading for mixing the two stages in the full, original circuit.
" I will say no more "

snk

Ok, so I made a verobaord layout out of the schematic I wrote... and.. it's working  :icon_mrgreen:
I am sooo happy, I just spent 15 minutes with the synth, and the sub-oscillator is adding so much to its potential!
Thank you very much to all of you, I managed to make the mod I wanted... and I learnt a lot from your input (dealing with schematics, etc). 8)





Rob Strand

Good stuff.

For those 1k + 100n networks, 10k + 10n would be preferable for a CMOS gate.   It's just a minor nitpick.  In this ckt it's not a bit deal, if it works leave it.
Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.