HELP! J201 Biasing for Distortion

[Rayman]

Can someone please help?

I have a distortion circuit similar to those on Joe Davisson's site and ROG.  I'm using three transistors in series.  Between the first and second transistor (stage) is a 1M pot to ground for a gain control.  Initially I had a cap after the first stage (just before the 1M pot), and another cap after the pot (just before the second stage).  The circuits at ROG and Analog Alchemy are setup the same way.

Here is what I can't figure out.  When I remove the cap before the second stage (so there is no cap between 1M pot to ground and second transistor), the circuit sounds MUCH better.  Because the 1M pot goes to ground the voltage at the second transistor gate varies (and subsequently the bias voltage at the drain varies).  I measured the drain voltage between 5.5 and 6.2 volts depending on the pot level.  I don't understand why the circuit sounds better if the second transistor's not biased to about 4.5v at the drain.

The first and second transistor's are J201s.  Hopefully someone can explain this.  I realize it may be hard without looking at the entire circuit.

Any help is appreciated.

[Joe]

With plain JFET stages you don't need the extra capacitors. I would ensure that the AC signal going into each gate doesn't exceed around .3V above source. This basically means use large enough resistors between stages. Another trick is to run a 10M resistor between drain and gate, and include the coupling capacitors. The slight amount of negative-feedback increases linearity, and the positive bias prevents the gate/source junction diode from gating.