??? Can someone explain the pins on a CD4049UBE and how to use these things?

Started by PenPen, April 24, 2006, 10:05:40 PM

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PenPen

I'm totally baffled. I want to try out a CD4049UBE on the breadboard, so I go and look up the datasheet, and I totally do not understand how this thing is supposed to be hooked up. Can anyone give me a quick tutorial on how these pins correlate to audio use?

cd

There are six inverter sections.  If you can imagine each section as a triangle pointing to the right, the pointy side (on the right) is the output, and the flat side (left) is the input.  Think of it as an opamp, but with only one input - no inverting or non-inverting, only inverting.

PenPen

Hmm, ok. So, following the block diagram, pin 3 is the input and 2 is the output? For one stage, I mean.

Can you set the gain, or is it a fixed gain level?

cd

Quote from: PenPen on April 24, 2006, 11:26:36 PM
Hmm, ok. So, following the block diagram, pin 3 is the input and 2 is the output? For one stage, I mean.

Can you set the gain, or is it a fixed gain level?

I don't have the datasheet in front of me, and my memory for pinouts sucks, but that sounds right.

You can set the gain the same way as you would with an inverting opamp stage.

Sir H C

Gain is not that high, maybe 30dB I think.  To control it, you have a resistor to the input, and then one from the output to the input.  The gain is set as the ratio of the two resistors (rout/rin) modified by the gain of the stage.

PenPen

Quote from: cd on April 24, 2006, 11:33:59 PM

I don't have the datasheet in front of me, and my memory for pinouts sucks, but that sounds right.

The datasheet shows pin 3 being A and pin 2 being inverted A, so I'm assuming that is the output for the inverter. Thanks for the clarification.

Quote from: cd
You can set the gain the same way as you would with an inverting opamp stage.

Here I'm confused. I admit I'm not an expert at opamps, the method I've always followed is run into non-inverting input, loop output back with a voltage divider back to the inverting input and vary the amount of signal into the inverting section to control gain. Do you mean like what Sir HC said?

Quote from: Sir H C on April 24, 2006, 11:49:05 PM
Gain is not that high, maybe 30dB I think.  To control it, you have a resistor to the input, and then one from the output to the input.  The gain is set as the ratio of the two resistors (rout/rin) modified by the gain of the stage.

Hmmm. Ok, so Rin is for example 10k, Rout is 100k lin pot, giving a gain of 10 at max?

Thank you for your answers thus far. You are clearing things up quite a bit for me.

gez

Quote from: PenPen on April 25, 2006, 12:43:16 AM
Hmmm. Ok, so Rin is for example 10k, Rout is 100k lin pot, giving a gain of 10 at max?

In theory, yes.  In practise though, the gain of inverters is pitiful and you might not even get a gain of 10.  Although data sheets say you do, you don't (do some empirical tests with a scope, then laugh all the way to the parts bin).

PS  Always helps if you link to the Data Sheet in question (I can't remember the pin out either).
"They always say there's nothing new under the sun.  I think that that's a big copout..."  Wayne Shorter

George Giblet

> In theory, yes.  In practise though,

It depends what "theory" you use.  The gain = -Rf/Rin depends relies on the opamp gain being high.  A "real" opamp has a gain of many thousand and the gain equation is valid.  When the opamp gain isn't large it doesn't work well, the equation is actually an approximation which assumes the opamp gain is large.  The true gain equation uses feedback theory to predict the gain - this theory is more accurate.  The result should show the overall gain depending on Rf, Rin and A (the amplifier gain) - the gain will be less than Rf/Rin.  Using CMOS gate as an amplifier only has an A of x30 or so (not 30dB).  The gain reduction factor is something like 1/(1 + (1+Rf/Ri)/A), giving a final gain of (Rf/Rin)x 1/(1 + (1+Rf/Ri)/A).  If Rf/Rin=10 and A=30 you end-up with a gain of only 7.3 ie. less than 10.

gez

Quote from: George Giblet on April 25, 2006, 10:35:47 AMUsing CMOS gate as an amplifier only has an A of x30 or so (not 30dB). 

Ok, should have made my post clearer.  Yes, I'm well aware of what you mentioned, but what I was trying to convey was that 'A of x30' (and gain depends on supply voltage but presumably you meant 9V supply) isn't the case, it's much lower in the real world (data sheets are BS compliant).

If you decouple feedback* (if I recall, this is how the test circuits shown in most data sheets are wired up) so that there's no -ve feedback, then measure the the output of a stage, you'll find gain to be a hell of a lot less than 30.  Try some testing with a scope, you'd be surprised.

But yes, you'd need to factor in this low gain in order to get the true gain of a stage with feedback.

*Edit: need to use resistors with value as large as possible to prevent loading the output.

"They always say there's nothing new under the sun.  I think that that's a big copout..."  Wayne Shorter

George Giblet

> Ok, should have made my post clearer.

I wasn't nit picking as such.  The main point I was making is theory often works if you use the appropriate one.

But now you have made things clearer, it doesn't agree with what I have found.

> gain depends on supply voltage but presumably you meant 9V supply

yes and yes (well, as I remember).

> isn't the case, it's much lower in the real world (data sheets are BS compliant).

Interesting.   I have measured this a number of times and on quite a few inverters, the gain always turns out to be around 30 (say +/- 5) at 9V.

> If you decouple feedback

I know what you are saying and it is correct.  One problem is if you pull the resistors of and it changes the DC biasing conditions (which will happen in the case of ther 4049) which means the operating point you are measuring at is no longer valid.  The way to do this is to take the feedback resistor and split it into two series resistors then short the junction point between the two to ground.   The 30 gain I quoted is the maximum gain possible (which is what the manufactures quote as well).

Sometimes it's difficult to split the AC and DC behaviour like idealized feedback books show.  It can be done but it requires more elaborate schemes.

If you try to run a normal high gain opamp in open loop it will be impossible to get an sensible AC behaviour out of it because the output will saturate against the rails due to DC offsets and high gain.  The split resistor + cap idea saves the day, but there are other ways to do it as well.

With the CMOS gates I doubt a 100k load will affect the gain much.


PenPen

Thank you both for the info. Seriously helpful. I'm going to get to work on this tonight.

gez

Quote from: George Giblet on April 25, 2006, 11:35:02 AMI wasn't nit picking as such.  The main point I was making is theory often works if you use the appropriate one.

No problem, and I agree.  Hope I didn't come across as snotty, I tend to enter 'Spock' mode when it comes to electronics and that probably comes across as arrogant at times (not my intention, I assure you...Capt. Kirk).

QuoteWith the CMOS gates I doubt a 100k load will affect the gain much.

No, it doesn't make that much difference, but I still like to keep things as high as possible when I'm doing testing...anything else would be illogical.
"They always say there's nothing new under the sun.  I think that that's a big copout..."  Wayne Shorter

TELEFUNKON

PenPen: the searchbutton is your friend too  :icon_idea:
type:  cmos inverter

jxoco

The intended use of these chips is to invert to invert the polarity or state of a binary off or on, not a bigger off or a bigger on by providing gain.


datasheet;
http://pdf1.alldatasheet.com/datasheet-pdf/view/26882/TI/CD4049.html

puretube


PenPen

Quote from: jxoco on April 26, 2006, 03:29:44 PM
The intended use of these chips is to invert to invert the polarity or state of a binary off or on, not a bigger off or a bigger on by providing gain.


datasheet;
http://pdf1.alldatasheet.com/datasheet-pdf/view/26882/TI/CD4049.html


I know what its primary intent is for, but its been used for several pedals for audio amplification. Examples are the Red Llama, Hot Harmonics, and the ROG Double D. I intend to use one for an OD.

Peter Snowberg

The TI datasheet doesn't linear use. Some other maker's data does. You need the 4049UB for audio use.
Eschew paradigm obfuscation


Vsat

Something to keep in mind when using CMOS inverters in linear circuits (including the 4049) is that protection diodes are present on the INPUTS as well as the OUTPUTS... plus some parasitic diodes. Not all manufacturers datasheets show these... RCA appnote ICAN-6572 (from memory... I think this is the right number) shows the various I/O protection structures used in the RCA 4000-series CMOS chips. In VCR applications these diodes do not normally present a problem as the  peak-peak AC audio voltage present at the MOSFET drain (the inverter output, with output protection diodes...) is kept quite small (normally well under 100 mV p-p) in order to avoid  distortion from audio signal modulation of the FET channel resistance near pinchoff.  This is well below the 0.6V required for the protection diode(s) to start conducting, and the diodes will not conduct.  Also note, in VCR applications, the control voltage is presented to the gate (the inverter input, with input protection diodes).  If there is any chance that the input protection diodes will conduct, current-limiting should be provided with a resistor put in series between the inverter input (gate) and the signal source, to protect the protection diodes.
Mike (only temporarily back on the forum)