Max voltage for jfets?

[ildar]

I checked the datasheet for J201s, and I believe that the max voltage is 40v.
What I really need to know is what would be the maximum voltage for jfet-based pedals, such as the ROG Thunderchief?
I'm not really wording this very well, but the gist is that I've come across a 30v power supply and would like to run  some of my jfet pedals at that voltage, understanding that the jfets would be biased at 1/2 supply voltage. What else would I have to change, assuming all the components are rated higher than 30v?

[R.G.]

What I really need to know is what would be the maximum voltage for jfet-based pedals, such as the ROG Thunderchief?

The max voltage for any circuit to survive cannot be guaranteed to be any more than the rated max voltage of any of its components.

For instance, if you have a JFET rated at only 25V - some JFETs are - then you cannot simply trust that even if the device is biased to 1/2 of that that during max signal, power supply on/off or other unexpected conditions that it will always work with a 30V supply. Same for electro caps.

But overvoltages are not the only challenge. A zener diode is set up to expect a very limited range of input voltages. If you crank up the power supply voltage, you may overdissipate and burn out a zener, or it's current limiting resistor.

Then there is the issue of operating properly at a higher voltage. Even if the circuit survives, you don't know that it will be properly biased, because not all circuits are designed to have biased proportional to the supply voltage, nor to be independent of it. The circuit may survive but sound terrible. Or just slightly off.

If you want to run JFET pedals at 30V supply you must do at least the following:

1. Use only JFETs with BVds greater than 30V with some safety margin. I would not do this with less than 40V - rated JFETs if the 30V is regulated, over 50V if it is not.
2. Change all of the capacitors to have voltage ratings over 35V if the 30V is regulated, over 50V if it is not.
3. Rework the design point of any biasing, particularly on any zener diodes, JFETs or other active devices. I'm not familiar with the Thunderbird or other JFET "amp emulators", but in general you'll have to tweak the bias on every one of them. What to tweak and how to tweak them depends on the circuit.

[Ardric]

ROG's revised Fetzer Valve article talks a little about voltages.  http://www.runoffgroove.com/fetzervalve.html

It seems you could expect more gain.  J201's would be *very* gainy, and 100K as a drain trimmer may not be enough resistance to get them to bias.  The larger drain resistance will also interact with the value of the coupling caps between stages (usually 22n), in effect letting more bass through than was perhaps originally intended.

You may have better results with higher Vgs fets like J202's, as well as decoupling the power supply and grounds.

You'd also get a little more output at max volume, of course.

[ildar]

Thank you both for your replies.
Ardric, I understand all of what you mention except decoupling the power supply and grounds. In the Thunderchief, for instance, are you referring to the 100uf cap from 9v+ to ground?

[Ardric]

Yes.  I've personally concluded that a great big +9VDC rail held up by a single 100uF is not good enough for high-gain circuits.  The tube amps that these JFET emulations are based on had multiple stages of power supply filtering.  This is mostly because they had to remove hum from a rectified AC supply, but it also isolated the triode stages from each other.  It prevented signals feeding back through the power supply.  Since each triode/JFET stage is inverting, they would generally put two consecutive gain stages on the same power supply node.  They would then cancel each other out to some extent.

Take the Thunderchief for example.  I'd first put a small series resistor between the battery/adapter and the 100uF to let the cap do it's job... say 100 ohms.  This filtered power then supplies Q3 and Q4's drain trimmers.  I'd then insert a resistor in series with the +9 power between Q1/2 and Q3/4, perhaps 220 ohms, and add another 100uF cap from the Q1/2 power node to ground.  Now any hard tugging on the power rail from Q4 should find it harder to feed back to the front, and any hum from the wall wart will be seriously attenuated.

I'd tie the grounds together locally, then bring that back to a single star point for all the grounds.  Most of that is just board layout. I'd use an isolated input jack with the sleeve to Q1's local ground node.  Any sensitive wiring can be 2 or 3 conductors (ie signal, signal ground) plus a shield.  The shield connects to the star at one end only.  The signal ground connects to it's local ground node.

I'd also consider add a series 'grid stopper' resistor and 'Miller' capacitor to the JFET gates to force in a little high-end rolloff.  I think it helps a lot.  The Fetzer Valve article suggests 33k/220p.  I'd put these right up against the JFET socket when I do the layout, particularly the little cap.  Gates are sensitive, so I keep those wires as short as possible.  I wire the wiper of the drain trimmer to the PS side, not the drain side, because it reduces the amount of wire that carries signal.  The drains are where the big signals are, so I don't see why I need more of the trimmer to carry AC than is necessary.

I'm not an EE and can't support this all properly with math, so I'd certainly welcome any comments on how much of this is effective and how much is konb voodoo.  I've added these embelishments to my third ROG TC w/tonestack and my EC, and in both cases I thought it was for the better.