Output buffer question for Dr. Boogey

Started by ayayay!, February 17, 2009, 03:39:36 PM

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ayayay!

I don't want to re-hash all of the debate over this wonderful circuit.  I just built another Dr. Boogey and wanted to try the output buffer on it, using the original schem with the large tonestack & volume values.  (Vol= 1Meg, Presence=100k, etc...)   

As you can see in the attached schem, this is just one of the proposed output buffers.  I like it.  It's fine.  Please don't badger me trying to do it any differently.   ;) :D ;D

My question is this:  Doesn't C23 seem kind of small?  I wouldn't mind a wee bit more bass, so wouldn't a .047uF rather than .022uF give me some more bass without impairment?   I'm probably just going to do it anyway, but wanted to pass along that this buffer works just fine for the original values.   :D  Cheers! 

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alanlan

#1
The roll off frequency at the bottom end actually depends on what the circuit is driving, but for reasonably high impedance loads (say >100K) it should be OK.  Increasing the value might possibly gain you some extra low but whether this is useful is your opinion really.  Easiest way is to try it.

<edit>
I meant to add that this source follower may suffer from 2 pitfalls (this is just my opinion from experience of using JFETs):
1) The output is probably going to bias quite a bit lower than 4V so you may lose the bottom extremes of you signal (if they haven't already hit the rails anyway in preceding stages)
2) The 100K source R is probably a bit high in as much as again, with a lower value load, it will bottom out because there isn't much current swing through the device.

My solution would be to add some DC bias to the gate to bring up the output DC level and reduce the source R to something more like 20K or similar to provide more current swing and hence more headroom on lower signal excursions into lower value loads.

For me, I like to use a BJT follower but each to his or her own.

ayayay!

QuoteMy solution would be to add some DC bias to the gate to bring up the output DC level and reduce the source R to something more like 20K or similar to provide more current swing and hence more headroom on lower signal excursions into lower value loads.

Makes perfect sense!  Thanks alanlan. 

BTW, I did go ahead and put the larger cap in.  It did what I needed.  But I'll keep the above procedure in mind going forward. 

I just need to rebias a little now that the buffer is in.  Other than that it's great.
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alanlan

It would be interesting if you could measure the DC output of the source follower i.e. across the 100K - I'd be surprised if it were any more than 2V probably more towards 1V.

ayayay!

I'm cracking it back open tonight to rebias, so I'll do that.   ;D
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