Having a hard time wrapping my head around this...

[earthtonesaudio]

http://www.edn.com/article/CA223208.html

So... what would be the max. delay time (theoretical, not necessarily using the part values shown) if you used a PWM frequency of 20kHz?

[R.G.]

It's a logic signal delay line, not an analog signal delay line.

[earthtonesaudio]

It's a delay line for PWM signals.  Retaining duty cycle information to 0.1% accuracy seems pretty analog to me.

[tommy.genes]

Given that a PWM pulse chain looks a lot like an audio square wave, you could probably have some glitchy delay fun with this concept, but it will not be a pristine "digital delay" line like you might expect.

PWM is a process whereby a fixed-frequency pulse chain of 50/50 duty cycle (essentially a square wave) has its duty cycle, or pulse width, modulated by a baseband signal. This encodes the information within the baseband signal onto the carrier of the square wave for transmission over a channel with subsequent decoding at the receiving end. This analogous to how baseband audio is used to freqency-modulate an FM carrier signal for radio broadcast. In the PWM case, the information is contained within the varying pulse widths of the chain. It is not contained within either the frequency or amplitude of the signal, as it would be in baseband audio, nor is it contained within the on/off status of the signal as it would be in a baseband digital signal.

Now you could take analog baseband audio and use it as a pulse width modulation source. Theoretically this could be done directly (analog), but I suspect most PWM is used for digital transmission, with specific, quantized pulse widths defined. Therefore you would have to go through an interim analog-digital conversion step, e.g. PCM or ΔΣ, to get digital audio, then that would have to be modulated onto the PWM carrier. The modulated PWM carrier could then be run through the delay line we've been discussing, but you would have two more conversion steps at the end (PWM to digital, digital to analog) to get your delayed baseband audio. At that point, you'd be better off just using one of the well-established digital delay techniques, not the least of which would be the good old Princeton chips.

Maybe I shouldn't have had that second cup of coffee...

-- T. G. --

[earthtonesaudio]

I don't think it has to be so complex.  Notice in the circuit that the incoming PWM signal is split into two parallel delay paths.  One processes the rising edge, the other processes the falling edge.  This is key, because now the delay circuitry doesn't have to deal with duty cycle!  Each side is basically just delaying a fixed frequency square wave.  The RS flip-flop at the end of the circuit reconstructs the duty cycle information... brilliant!

Anybody else see the potential here?  Since each half is just dealing with a square wave, the delay doesn't have to be an RC time constant.  It could be a decade counter, shift register, or whatever. 

[slacker]

I'm with as far as the basic idea goes. PWM your audio then feed it into the circuit, then, so long as you apply the same amount of delay to both signals between the flip flop and the comparator the reconstructed signal will basically be a delayed version of the original audio.

I'm not completely sure how you are going to use a decade counter or shift register to do this though. I think I can see what you mean, but aren't you just going to have the same problem as with the other similar idea you had where you're going to have trouble getting any meaningful amount of delay?
Having said that a few CD4040 counters might get you there. Or would they? I'm having trouble visualising what would happen.

[earthtonesaudio]

On second thought, I don't know how a decade counter would work, either.  But a shift register or FIFO would, I think.  You'd just use two.  One for each edge (rising or falling).  Essentially each edge gets turned into a squarewave, which is really easy to delay using a shift register or FIFO.  Then the delayed outputs are used, just like in the EDN article, to set or reset a flip-flop. 

The nice thing about using a FIFO is that they're available in rather large sizes.  You could get a stupidly huge one and jack up the sample rate for super hi-fi audio, respectably long delays, or both from a single chip.

But even cooler (in my mind at least) is that the whole thing is still analog!  The fidelity is really just limited to the sample rate, and you don't lose any information with more stages of delay, like you would in an analog bucket brigade.

[tommy.genes]

When I said this would be glitchy, I thought you were talking about feeding baseband audio directly into the referenced circuit. Since this thing wants to see fixed-frequency square waves, which most instruments don't deliver, this approach would run into all of the problems faced by the Crash Sync, the Blue Box and other similar effects that try to use digital logic devices for analog audio.

If you are talking about creating a true PWM signal using a 20kHz square wave as the carrier and the baseband audio as a modulator, there still is one (at least) issue to consider. By the nature of PWM, the negative edge arrives at effectively-random intervals after the positive edge. This variation of time is where our original information is being carried, so we don't want to lose it. I'm open to correction, but I'm guessing that an asynchronous FIFO pushes bits out the back end when triggered by bits entering the front end. The problem with this is that the bits that just left the back end have now inherited the duty cycle of the bits entering the front end (give or take a bit), effectively providing no delay at all! 

Remember, in PWM the 1 or 0 value of the bits is not important (they're always alternating 1 0 1 0 1 0 etc.) It's the ratio of the time that the 1 bit is active to the time that the 0 bit is active that contains the useful information. An asynchronous FIFO will effectively remember the 1 0 1 0 1 0 pattern for you, which is useless, but I don't see how it is remembering the duty cycle information that is critical to recreating the original signal.

Now you could run a synchronous FIFO with a clock speed much faster than your PWM frequency (>10X), but that would seriously cut down your delay time from a given FIFO, and that would ultimately be a form of sampling, so your idea of "keeping it analog" is lost at that point. I'm still glad you got me thinking about this though, as I'd not really checked out those FIFO chips before. I'm wondering if a simple combo of ADC --> FIFO --> DAC with an external clock might not provide the same functionality as the Princeton chips, but with longer delay times.

BTW, I found it quite helpful to compare and contrast these two Wikipedia articles in understanding this topic: Pulse Density Modulation (PDM) versus Pulse Width Modulation (PWM).

-- T. G. --

[earthtonesaudio]

Yep, I gotta think a little harder on this it seems.  Although I do think a large FIFO, configured as a shift register, could handle it.  The only restriction would be the clocks would have to be independent, and a bit faster than the PWM frequency (several times faster probably).

[earthtonesaudio]

After y'all's advice and going over various scenarios dealing with FIFOs, shift registers, even BBDs, I came to the conclusion that you'd need huge amounts of storage, or very low sample rates, to get decent delay times (long enough for flange effects), and the effort would be small compared to a straight ADC/memory/DAC technique and probably sound worse.

So, in the interest of fun and simplicity, I think it would be fun to experiment with this in the "glitchy" sense.  I'm thinking something like this:
Audio input converted to PWM at 20ish kHz,
Delayed through one (or more) stages as described in the EDN article,
Instead of a 2/3Vcc reference, the comparators get a variable voltage reference, therefore variable time delay,
Filter the output to extract the audio (and feed back into the audio input again...  )

This means, as you increase the delay, you'd get a very unique type of sample reduction.  The output PWM signal would be missing little chunks as you increased the delay time beyond .05ms, but it would be different than simply lowering the sample rate.  Perhaps a whole mess of weird harmonics would be generated.


Just for fun I want to try and do it all with 555 timers and discrete transistors.   

[earthtonesaudio]

It took the effort of sketching out the same basic circuit using mostly 555 timers to realize that it's just a couple one-shots... which incidentally is also in the headline of the article.     Ah well, I think I learned a little from it anyway.