creating a digital delay from scratch with RAM and a ADC/DAC??

[loss1234]

can anyone point me in the right direction? i am looking for a few things

1. the basic concept of how to do it.
I know how to use a DAC and an ADC. i know how to make a hi-freq clock. i have a bunch of old ram chips.

where do i go from there?

2. are there any old devices (non microprocessor driven) that i can look at for inspiration? the simpler the better.

i have heard the mxr digital delay is a lot of circuitry. hopefully something a bit simpler

or maybe it will all make more sense once i understand what to do.

also..can anyone tell me..is it even worth bothering with I/O ram? should i just buy some old ram with seperate In and Out pins?

thanks so much

[earthtonesaudio]

If you just want a "straight up" delay (no reverse delay or multi-taps), you can buy large FIFOs and configure them as shift registers, just vary the clock speed to change the delay time.  You'll need a few extra logic gates to make sure the FIFO starts reading out once it's written full, but you can probably figure it out from the datasheets.

The main tradeoff is delay time and features vs. complexity.  The large FIFOs have a RAM array inside plus a bunch of addressing circuitry.  If you want a longer delay, you pretty much have to start from scratch with your larger RAM array and handle all the addressing externally.  That's where it gets over my head.

If you're savvy, you can get a few extra tricks from the simple FIFO approach, by manipulating when data is clocked in and read out, but that's over my head too.

Also, large FIFOs are a little pricey ($17+).

[loss1234]

where do you even buy a FIFO? sadly i think the approach might limit some of the main things i wanted to try.

so far it is looking very complicated! but my main complaint with someting like the pt2399 is that you just cant modify it much

so i figured maybe trying to do it the old fashioned way

thanks

[Mark Hammer]

For the most part, it's just not worth it, when you consider chips like the PT2395.

Note that a from-scratch design would require you to have not only A/D and D/A, but addressing to actually get the data to and from the RAM, plus a clock circuit to control the addressing in a logical order.  With the PT chips, all of that is already done for you.

If you wanted to get really fancy, for experimental purposes, then perhaps consider a PT2395 (800msec delay/storage with 256k DRAM) with a couple of DRAMs and some extra bells and whistles to let you select between stored samples.  But even there, you start to get big, complicated, pricey, and risky.

There WAS a digital delay project article in a 1980 issue of POLYPHONY that I could possibly scan, but we're talking rackmount and honking big power supply for a mere 100-200msec.  There was also a project in Everyday Practical Electronics from the early 90's called the Polywhatsit ( http://www.bsom.org/?p=46 ) that would do things like reverse delay.  However, it too was a BIG project with multiple boards.

I admire your sense of adventure, but just as I would admire my recently graduated engineer son's courage to try out a human-powered flying machine off a seaside cliff, I would still advise against doing so.

[R.G.]

The bottom line on this is that it is easy to do conceptually, but difficult and expensive to do in practice, and it involves some heavy compromises in hardware vs software.

The first thing you run into is that A/D and D/A are fairly complicated to do to high precision and well, so you have to immediately set limits for "precision" and "well" that you're willing to live with. The number of bits for each sample word you are willing to live with is an important first decision. Each sample of a signal involves representing a conceptually infinite precision signal as a series of bits. The number of bits represents the degree of accuracy of representation and so the difference between the smallest steps in the representation and the actual signal is, on average, about 1/2 of the smallest bit size. After you sample, you can *never* get back the precision lost with the first sampling, so each sample has what amounts to 1/2 bit of noise appended to it. Each successive bit of sampling precsion adds about 6db of better signal to noise (from the sampling; the original signal keeps whatever noise was there already) so you can quickly do the math. Sixteen bit sampling wasn't picked for CDs because it's a neat two-byte chunk. Rather, it was picked because 16 bits gets you over 100db of signal to noise in the sampling/reconstituting process. That's a degree of perfection that's not ever reached in practice, so it had to be much better than noise from other places.

Somewhere around 12bits of precision is the noisiness of un-dolbied cassette tape, and in my mind that's the minimum you can in good conscience use. So you need a 12-16 bit A/D and D/A as well as data path width.

Then you have to sample it often enough. Nyquist's Sampling Theorm puts limits on sampling without aliasing at sampling 2x the highest frequency of interest. Again, for CD quality that was picked at 44.1kHz to be able to get 20kHz sounds. You could probably relax that to 20kHz sampling and live with 10kHz for guitar work.

At a minimum then, you need to have A/D/A hardware of at least 12bits of precision and 20kHz sampling rate. Those do exist, but the affordable (under $25, say) chips are uniform in putting out their samples in serial frames of left, then right side, and bits either most significant bit (MSB) first or least significant bit (LSB) first, and those clocked with a bit clock inside the frame. The frame is longer than the bare number of bits in most cases.

To save that in RAM, you have to decide whether to put it in the RAM in bit-serial form or parallel words. You could do bytes or nybbles, but that's more complex logic. Doing it bit-serial into RAM involves running your RAM in synch with the frames, and parallel involves deserializing the bits, putting them into RAM, then getting them back out and re-serializing them to put them into the D/A converter. Using bit-serial makes address computations harder, and going parallel makes addressing easier but you have to build de- and re-serializing logic at the ins and outs of your RAM.

Notice that all this is just to get the stuff into and out of RAM, and you haven't yet done any audio effects. To actually do effects, you need to either build hardware-addressing logic for the RAM that implements the effects you do, or more likely program a uC controller to do the addressing under software control to store and fetch data words delayed in RAM. The addressing has to be fast enough to never miss a word, so you have something like 50uS maximum for 20kHz sampling interval to compute the next address(es) for each sampling time. A simple delay means you need to compute one store and one fetch of a word per time slot. Doing anything with multiple tapped delays or any more fancy DSP will require you to compute more addresses during the same time. And it's a real-time problem, so you have to ensure that every possible computation finishes within the allotted time interval as set by your sampling rate.

Notice that the complications just keep building up. It's not impossible, or even all that difficult, to do any one piece, but you rapidly overflow what can be stuffed into a pedal.

The side step a lot of manufacturers do is to not use a parallel-word A/D/A. They go to sigma-delta converters, which produce a serial bit stream directly, and of high precision. However, there is no free lunch there. To maintain the precision, the serial bit stream has to be *fast* and so you may have to sample 20-100 times as fast as with parallel A/D/A conversion. The advantage is that sigma-delta conversion is inherently single bit stream and constant clock speed, so you can directly stuff the bit stream into and take it out of a single bit wide RAM, with no serial/parallel conversion. You just have to do it at many MHz. Once again, not a problem with today's ICs, but getting multi-MHz logic to work reliably requires good prototyping and layout skills because all the stuff we can ignore because audio is almost DC can't be ignored with fast logic.

The bits and pieces are well known. It's just big, technically demanding, and expensive. That's why single chips with all the junk in them are the low cost approach.