my dspic ADC saturates

[potul]

Hi,

Anyone has dspic ADC experience?

I'm trying to get the basic backbone working for my freeze-a-like project (see other post), using a dsp30f4013 and its internal ADC
So far I try just to read the dspic ADC and copy the result to the PWM output.

Looks like PWM is working, and ADC is getting results, but.... the ADC is saturating at a low voltage. AVdd and AVss are set to 0 and 5v, but the input range seems to be only from 0 to 1.6v, and from them on it saturates. This is a problem, as my input signal is biased at 2.5v,... so the adc saturates all the time.

Any idea on what could be failing?

Regards,

Potul.

[cpm]

have you set up correctly the Vref+ and vref- pins?
and select the correct references for Vref to the DAC and S/H modules
(as seen on figure 19-1 on datasheet)

[markseel]

I don't have experience with the PIC devices but ...

The ADC is a 12-bits, is the 12-bit sampled word aligned as you expect it?  Some MCU's give you the option to have the word reside in the most significant bits of the 16-bit ADC value or the least significant bits of the 16-bit ADC value.

Most on-board ADC's have a selectable voltage reference.  Is your ADC's reference set to Vcc?

Are you obtaining the sample value AFTER conversion is completed?  You should obtain the sample value after conversion is completed by either polling/waiting on the 'conversion done' bit or by handling the appropriate ISR.

[potul]

Hi, thanks for the suggestions...

I will double-check all configuration, specially referring to Vref (although I've already checked it multiple times)
I have it configured to use AVdd and AVss as reference, so nothing is connected to VRef+ and VRef-. I will try to change it to use external reference and use VRef pins instead, and see if this makes any difference.

Regarding the 12 bit alignment, I thought about it, but I think in this case shouldnt be and issue, as I use the ADC to get integer results, and in this case the bits are aligned to the right. But I will double check the value of the ADC capture and verify if it ever gets higher than FFF, which would indicate I have a bit alignment problem.

ADC interruption is working fine and as far as I know I'm getting the data after conversion. I've tried to reduce by a factor of 10 the sampling rate to verify if it could be an acquisition time related issue, but the result is the same. I tend to think the issue is related to the reference voltage...

Tonight I'll check again...

Thanks

Mateu

[potul]

Nevermind.... I found the issue. Sometimes my own stupidity amazes me.

At the end the ADC is working fine. The problem was that I was saturating the PWM duty cycle, because I was feeding the 12 bits ADC data into the PWM duty cycle (stupid me, it had to be 10 bits).

So, after shifting 2 bits the ADC result, now it looks like it should.

Thanks all for your help, your suggestions were really helpful in troubleshooting.