Why Are Connecting Traces So Skinny?

[KazooMan]

OK, showing my ignorance here!  A question for all the EEs who can give be the benefit of their education.  (This is an open invitation for R.G. to weigh in!).

I was just etching a board for a pedal (nameless, but this is a long story) and as I was headed for the drill press, I asked myself the question I have asked many times before.  Why are the traces so skinny?  This is not a terribly dense layout but the traces between the pads are really thin.  I know this looks really nice on the computer screen as you are looking at the layout, but when there is a ton of blank space between traces why make them so thin?  It only takes a minor defect in the transfer or photoresist process (Mine was a photoresist on a good quality board stock from Allied) to result in an open trace.  I cannot see any actual problems with the board, but it seems overly "fragile" given the amount of blank territory between traces. 

This pedal has two boards and I had to redraw one of them in Photoshop to get an appropriate spacing of parts.  I beefed up the width of the connecting traces and had no problems with shorts and no problems with open traces or fragile links just waiting for a reason to go open. 

Is there a good reason for this practice other than the obvious desire of a manufacturer making thousands of boards wanting to keep the amount of residual copper to a minimum?

[Kearns892]

Well if it's a commercial layout, the machines used to mass produce the boards are probably fine dealing with that degree of accuracy. In that situation the question becomes why not make traces so skinny.

[pjwhite]

When laying out a complex board with lots of densely packed ICs and lots of traces, the trace size is usually picked to allow routing the most traces possible without making fabrication difficult.  A typical digital PCB design might use 8 mil trace and 8 mil space rules, for example.  This means that the smallest trace width is 8 mils (0.008 inches) and the minimum space between any two traces or circuit elements is 8 mils.  Some really dense boards go even smaller.  20 years ago, I typically used 12 mil space and trace rules (with DIP packages and no surface mount).  This is small enough to allow running traces between pads of a DIP package.
Exceptions to the standard trace width are usually made for power routing.  Here, power and ground traces are made as wide as possible, to minimize trace resistance and voltage drop when high currents are flowing. 
In general, it's a good idea to make all traces as wide as possible, after all traces are routed.  Practically, though, it takes a lot of time and effort to manually go through a design and edit trace widths and move things around when it's not really necessary. 

On small layouts like most stompboxes, wide traces are great.  Actually, minimizing the NON-copper area of a board will save you on etchant costs as well.

[KazooMan]

Thanks to both of the replies.  That is just about what I thought.  Unless I can be educated that there is a real reason for the fine lines running through a valley of empty board real estate I will continue to draw my connecting traces beefier. 

Continuing the question for the EEs, are there any circumstances where you need to maximise the separation between connecting traces while sacrificing the width of said traces?  What rules? Thick traces or wide separations?

[amptramp]

For digital logic, lines connecting devices act as transmission lines and it is sometimes essential to get the impedance of the traces to match the input impedance of the devices in use.  The impedance of the line would be SQRT(L/C) or more properly. SQRT(L/unit length / C/unit length).  If the lines do not match the terminating impedance, there will be a reflection back to the source that can upset the timing.  The inductance of the line is determined by the loop area between the line and ground and the capacitance by the field lines going from the lead to the ground.  For various versions of TTL, we typically used 140 ohms as the transmission line impedance.  Note that the frequency of the circuit in question was not the issue, it was the edge rate.  For "F" series TTL, the edge rate fundamental frequency, set by the rise and fall times of the waveform, was typically around 175 MHz, even if the circuit did not operate anywhere near this speed.

Small lines also minimize the capacitance to other lines and reduce crosstalk.  None of this should have much effect at stompbox analog frequencies except maybe for the crosstalk.

[PRR]

Narrow traces etch-through and wide traces short together.

In DIY audio, just split the difference. Not too fat, not too thin.

> lines connecting devices act as transmission lines and it is sometimes essential to get the impedance

One foot is one nano-second and 1 giga-cycle. Audio is 10,000+ times slower and pedal-traces are shorter. Not an issue. Not an issue even for 10MHz CMOS logic on a pedal.

> need to maximise the separation between connecting traces

If two lines must NOT be too intimate (output and input of a high-gain stage), they should never get near each other. Input from the northwest, output runs toward the southeast.

> residual copper to a minimum?

As Paul White says: you wanna remove the least copper possible. Copper removed is etchant used-up or router-bits dulled. But very wide traces with hairline etches just might give more stray capacitance than you want. Copy "sane" old design customs. Traces may be laid-out as if with pin-stripe tape, with about a tape-width between. When you find a large open area (and can't/won't reorganize for a smaller board), flood it with tape tied to ground, so it doesn't use-up your etchant.

[markeebee]

Answers from RG and Mark Hammer:

http://www.diystompboxes.com/smfforum/index.php?topic=88343.0

[teemuk]

The closer you run tracks together the higher's the chance for capacitive crosstalk, especially with high impedance circuits. Skinnier traces allow more clearance.

[pjwhite]

Continuing the question for the EEs, are there any circumstances where you need to maximise the separation between connecting traces while sacrificing the width of said traces?  What rules? Thick traces or wide separations?

Sometimes extra space is required to prevent high voltages from arcing over.  I did a layout for a caller ID box once where a minimum 50 or 100 mil space was required for isolation between all phone-line connected traces and other parts of the circuit.  That's because a phone line uses a 90 Vrms ring signal and can potentially be a couple of hundred volts above ground.

Tube circuits are another place where you want to watch for high voltages and allow plenty of space between traces that may have high potential between them.

[brett]

Hi
at audio frequencies we can ignore the idiosyncracies of radio and logic frequencies/slew rates.

In stompboxes the skinny, close lines are ok coz L and C aren't isses and the main thing to manage is track heating, which is negligible because currents are low (nA to tens of mA).  Power supplies and earth lines are where width is needed, and even then a mm or two of width is usually enough.  For valve heaters, etc, allow at least 4mm/amp.
cheers