Netduino onboard ADC for audio

[knutolai]

Hi forum
As a part of a school project I am going to make a digital guitar effect pedal. I've currently decided to try the Netduino platform (resources listed below). Ruffly its a Arduino only faster and with more memory (RAM and for program). Its programmed in C# (.NET framework) and runs on 3.3 volt making that the maximum input voltage of the pins.

Sooo.. For this project as it is my first DSP pedal project I thought I'd use the onboard ADC and DAC (both 12-bit), only adding a simple circuit with buffers for volume and effect dry/wet. What I need to figure out is how I prepare a audio signal for the onboard ADC pin?

I do not exactly deem myself proficient at electronics, but this is what I have come up with so far:
The pin expects a signal between 0 and 3.3 volt. A voltage above or below that would result in clipping. If a signal is exceedingly high voltage the pin will be damaged. Is there any good way of scaling any signal so that I know it wont exceed the limits listed above? I know I can apply DC offset to offset the signal (silence at 3.3 volt/2 = 1.65 volt) and 3.3 volt zener diodes to safeguard the pin.

It there anything else I can do to protect the chip and prepare the incoming signal? If have this feeling I've missed some crucial OP Amp application or something 

Any response is much appreciated

The Netduino 2 board specifications:
http://netduino.com/netduino2/specs.htm
Netduino 2 schemaitc:
http://netduino.com/netduino2/schematic.pdf

[SISKO]

Im no expert, but the firsts things that come to my mind is:
Antialiasing filter. Essential in all ADC.
Gain adjustable stage.
AGC? Kind off compressor
You *may* wish to have various inputs (guitar, mic, line level) if its gonna be reussable board.

Are you thinking about the output stage necesities too?

[knutolai]

So basically a low pass filter that cuts away everything above sample rate/2? Thanks. This is very helpful. Same goes for the Gain stage. I'm looking into automatic gain control compression.  seems useful!

This will be a project for guitar and/or feedback circuits using guitar pedals. A little of topic, but what would be the maximum voltage of a AC output from a amplifying circuit supplied with 9 volt DC? Im guessing 9 volt or so, but would that be a signal oscillating between 0 and 9 or -9 and 9?

I don't really know of any necessities for the output stage outside of adding a simple buffer and capacitors for removing any possible offset. Anything to add to that?

[SISKO]

The antialias filter needs to be a *very* sharp one. Or you can make your cut off  start way lower... like SR/4. You dont want any freq above SR/2 to enter your system if you are looking for a non distorted signal (its not the kind of distortion in a drive pedal, its non musical like a ring modulator)

You are right about output voltage. It would be oscillatin between 0v and 9v in an extreme case. Most of the time is much lower than that. Even if the circuit is running at full level, the maximum output voltage would be 8v or so.

Id add a headphone amplifier, a line level out (you may come up with an amp simulator!  ) and a guitar amp out. But those are not really necesary.

[knutolai]

So I designed a first draft using ExpressSCH. The idea is that I'll be able to control the input and output gain for the Netduino. As well as the blend/mix between the dry and wet signal. The part in front of the ADC is meant to limit the signal between -0.6 and 3.3 volt. The inverting opamp has a low pass filter with a Fcof (cut-off freq) of approx. 21kHz. With a samplerate around 96kHz I would imagine that to be tolerable 

Im not really a proficient circuit designer and I would appreciate any feedback for improvements very much! The main thing which is bugging me is the pre-gain implementation. I know how to calculate the gain from a inverting amp, but varying the input resistor would also change the impedance of the buffer. Is that problematic? I dont wish to change the feedback resistor as that also changes the Fcof. Any thoughts on that?

[ggedamed]

These are my two cents:

• I would use the input buffer to feed the ADC input inverter.
• I would choose 22k for the ADC input bias resistors instead of 100k to have the maximum bias current into the ADC input.
• You don't need the protection diodes as the ADC already contains input protection diodes (Figure 50 in CD00237391.pdf).
• Don't worry too much about the frequency characteristics, as the guitar signal's bandwidth is quite limited. Considering that the signal will be chopped to digits would be better to limit the bandwidth purposefully. There are distortion pedals that limit the bandwith down to less than 3kHz. You can get away with a 10kHz limit.
• TL072 works fine with loads down to 10k, so you can decrease the resistors to improve the signal/noise ratio.
• Just to have in mind - minimum gain of the ADC input inverter is ~0.5, you have no way to prevent input signal levels higher than 6.6Vpp to be clipped. If that's an issue, maybe a usual volume control will fit better.
• Also maximum gain is ~1.6, making a ~100mV guitar signal only 160mV - not a great signal/noise ratio.
• I don't think you need level adjustment at the DAC output. I would replace the DAC output inverter with an 2nd order low-pass filter.

[knutolai]

Thank you very much for this. Some great improvements here! However there is one thing I dont understand:
"TL072 works fine with loads down to 10k, so you can decrease the resistors to improve the signal/noise ratio."

Im not at all familiar with "loads" (coundnt find any good resources explaining the concept either, got any good research keywords?) I think I understand what you are suggesting (lowering the resistors, but keeping the ratio between the resistors in the buffer modules), but woundnt this hurt the impedance of the buffers? Can one have good SN-ratio and high impedance at the same time? By how great a magnitude do you suggest I lower my resistors?

[ggedamed]

For instance the output load for the input buffer is P2, for the ADC inverter is R5||R6, and so on. The purpose of a buffer is to have a high impedance at the input and a low impedance at the output. So you want the input impedance to be as high as needed by the preceding circuit. In audio they say the input impedance should be around 10 times bigger than the output impedance of the preceding circuit. The input impedance of your buffer or inverters is not affected by the changes in their output circuits.

You can make C2 1u or 2.2u and connect it to the input buffer's output, then make R3 47k or 22k. This would isolate the preceding circuit from the inverter.
Basically you want to have the resultant load being seen at the buffer load (R3 in parallel with P2) more than 10k but not too far for TL072. There are op amps that can handle output loads much better, like NE5532, but you don't need it here.

DAC output impedance is 15k in the datasheet so you can make R8 150k or 220k to minimize noise.

Right now I have a cold (hence the spare time and some dizzyness ), so please take everything I wrote with a grain of salt.

[knutolai]

Hmmmmm! I think I get it. Anyways so I made a new version of the circuit with your suggestions.
Pre gain goes from 0,23 to 4,8
Post gain goes from 0,23 to 5,1
I might add a capacitor in parallel with the feedback resistor in the inverting buffer after the DAC.

One thing that I thought about:
Wount there be any crosstalk between the output of the DAC buffer and the input of the ADC buffer (read as feedback-problem)?

[ggedamed]

It can be, although the output impedance of the input buffer should shunt it. Anyway, here's another cent:


Things added:

• input protection for the buffer
• TLE2426 for the reference voltage
• changed the feedback network around the ADC inverter, its gain is now x1/5..x20
• gave the DAC inverter fixed amplification (5 times)
• added a Sallen-Key low-pass filter at ~10kHz
• made the suming op amp inverting
• changed the blend pot into a dry signal level control
• added an inverter to help if the phase of the ouput signal is a concern

I hope it helps, I'm not that good at theory.

BTW, the ADC inverter has the inputs reversed in your schematic.

[knutolai]

Sorry. This is starting to go well over my electronics knowledge. I looks great and I really appreciate your help  I think I understand the functionality of the circuit for the most part however I do have a few questions/things I'm unsure about, as well as some circuit modules I don't understand the significance of:
1. D1 and D2 is meant to give the circuit polarity protection if a power supply with the wrong polarity should be connected (?)
2. What is the purpose of R1 and R6? I don't recognize them as being part of any buffer modules I'm aware of.
3. What is the purpose of connecting the potmeters to the reference voltage? Does it yield the same effect as connecting to ground (this is what Im most familiar with? Does using the reference voltage have any advantages?
4. Why would R13 and R14 be different?
5. Why would I need a 2. order LP-filter after the DAC?
6. Would the cut-off freq of the LP-filter in front of the ADC depend only on C7 and R4?
7. Lastly, what is the point of having four capasitors in parallell between +9volt and ground?

Again thanks so much for the help! I really wish to understand this thoroughly 

[ggedamed]

1. The diodes protect the input from any signal being larger than the power supply (9V in this case). It's the same as at the input into the ADC of your microcontroller.
2. Current limiters.
3. The op amp pins that are connected to the pots are at the reference voltage. We don't want DC currents through the pots.
4. Because the signal was already amplified 5 times by the DAC output inverter.
5. Antialiasing filter. Not the best option, but it'll do.
6. AFAIK, yes.
7. Two of the 100n (ceramics, as they are good at shunting high frequencies) are to be soldered as near to the supply pins of the op amps as possible. The other 100n capacitor helps the 100u capacitor with the highs.

[knutolai]

About the anti-aliasing filter. Why would I want it after the digital part of the circuit? If aliasing has occurred adding a LP-filter after the DAC won't remove the unwanted frequencies as they have mirrored around the nyquist frequency of the ADC (samplerate/2).
Is the anti-aliasing filter meant to prepare the signal for the next module (read as soundcard/digital-pedal/amp) in the signal path?

My approach to this circuit is kind of minimal in terms of component count. Is the TLE2426 really necessary for good results? Could I use a 5 volt regulator like the LM7805 instead? Or just regular resistors like in the original circuit?

Also I found this on the Netduino forum:
http://forums.netduino.com/index.php?/topic/496-netduino-now-with-internal-aref/
The Netduino board has a analog reference pin! I could use that to bias the signal going into the ADC right?  

Instead of the IC2 B inverting amplifier I'm thinking of adding something like this: (I mean of course the circuit architecture, not the specific values)

Wound that be unproblematic?

Oh and I absolutely love your gain potentiometer implementation! I thought about doing something similar to this, but really couldn't be sure if it would work!

Another observation:
Wont the buffer in front of the ADC always have a gain less than (-)1? I calculate (R4+pot)/R3 -> 20k/47k. I dont mean to be picky. Am I right on this or am I missing something vital?

[knutolai]

Here's a kinda unsure third draft:

I really want to keep the dry/wet controller-functionality. I think this will work. I'll definitely add the capacitors between the IC power pins, though I'm undecided on how to produce the Reference voltage as I'm limited to the parts currently in my possession.

[slacker]

There's no need for a fancy voltage reference, the voltage divider and cap in your earlier schematic will do the job. If you want something more solid you can buffer that reference with an opamp.

[ggedamed]

About the anti-aliasing filter. Why would I want it after the digital part of the circuit? If aliasing has occurred adding a LP-filter after the DAC won't remove the unwanted frequencies as they have mirrored around the nyquist frequency of the ADC (samplerate/2).
Is the anti-aliasing filter meant to prepare the signal for the next module (read as soundcard/digital-pedal/amp) in the signal path?

Ha, you got me! God knows what was I thinking. Of course you're right.

My approach to this circuit is kind of minimal in terms of component count. Is the TLE2426 really necessary for good results? Could I use a 5 volt regulator like the LM7805 instead? Or just regular resistors like in the original circuit?

The original resistor divider alows only for 0.45mA. Adding everything that is referenced to the +4.5V (the ADC inverter has the 10k + 100 resistors on the output) made me think I want more current capability from the reference. Of course you can use the original resistor divider with a buffer (op amp or transistor). 78XX regulators are fairly noisy and they would not give you a real half supply reference.

Also I found this on the Netduino forum:
http://forums.netduino.com/index.php?/topic/496-netduino-now-with-internal-aref/
The Netduino board has a analog reference pin! I could use that to bias the signal going into the ADC right?  

Yeap.

Instead of the IC2 B inverting amplifier I'm thinking of adding something like this: (I mean of course the circuit architecture, not the specific values)

Wound that be unproblematic?

I used an inverter because it's more fit for the mixing job, as it makes a virtual ground on its inverting input.

Wont the buffer in front of the ADC always have a gain less than (-)1? I calculate (R4+pot)/R3 -> 20k/47k. I dont mean to be picky. Am I right on this or am I missing something vital?

Let's see: minimum gain is 10k / 47k ~ 0.21, maximum gain is 10k / 47k * (10k (the pot) + 100) / 100 ~ 21.48. So, minimum gain will be less than 1, but this is what you wanted to be able to atenuate a high level signal. Isn't it?

I really want to keep the dry/wet controller-functionality. I think this will work.

Hey, it's your circuit. IMHO, a separate level control would be much more flexible, but if it works for you, it works.

There's no need for a fancy voltage reference, the voltage divider and cap in your earlier schematic will do the job. If you want something more solid you can buffer that reference with an opamp.

Actually it is fancy only if it's not already in your drawer.


LATER EDIT: looking behind, I found that the most usefull sugestion has not been given. Use a breadboard, there's nothing faster in clearing up almost all issues.

[ggedamed]

Uh, now that you added resistors before the blend pot, it will be able to atenuate the clean signal only 15 times (-23dB) and the processed signal only 2.3 times (-7dB). You don't need R13 and R14.

Also, R15, R9 and C12 look funny. Maybe you wanted R9 to be 10k or something like it? Or you can disband them and use the final op amp as an voltage follower.

[knutolai]

My brain kind of feels like scrambled eggs! OK, soooo.. I thought maybe change the architecture around a bit (in my head this makes a lot more sense now, though I might just have missed the mark completely)

Fourth draft:


The idea with the gain pots is that both the dry and wet signal would be amplified/dampened equally (to keep the mix even when the blend is set at 50/50). If my, and your, math (thanks for that calculation! I didnt have a clue one could amplify like that) is correct the input buffer gives a gain ranging from approx 0,2 - 20 and the output buffer gives a gain ranging from approx 0,05 - 5.
5 * 0,2 = 1
20 * 0,05 = 1 , meaning any dampening or amplification can be leveled

Now there probably are a few flaws here, as well as some guesswork from my part. As you pointed out breadboarding the circuit is probably a good idea at this point. I have to stop spewing schematic sketches everywhere! 
First of Im not sure if R1 is needed anymore. Im guessing it can be omitted as R2 makes it redundant (?)
Im guessing my output buffer is all wrong in relation to the impedance on the output of the other two buffers. I cant seem to wrap my head around how I would calculate the gain using P2.

Also Ive added a buffer to amplify the current for the Vref and changed the buffer in front of the ADC to a 2. order LPF.

[knutolai]

OK so I read through once more. If I understand correctly the load from the input- and DAC-buffers pushed onto the output buffer equals P2 (100k). When I then want a min. gain of (-)0.05 I would use a 4,7k feedback resistor in the output buffer.
Like this: (correct??)

[knutolai]

Let's see: minimum gain is 10k / 47k ~ 0.21, maximum gain is 10k / 47k * (10k (the pot) + 100) / 100 ~ 21.48. So, minimum gain will be less than 1, but this is what you wanted to be able to atenuate a high level signal. Isn't it?

Where can I find this formula?