MOSFET Guide for Idiots? Part 2

[Dylfish]

Hey Guys,

I've been trying to get around MOSFETs as a means of amplification of a guitar signal and everybody around heres been really helpful but I've got a question or 2 if anyone is able to help?

I'll use Jack Orman's Mosfet boost as my reference.



1) R1+R2 create a voltage divider that sets the dc bias to 3.44V

2) The Guitar's AC input (lets say 200mv peak to peak) "latches" onto the DC Bias and then caused the bias to swing from 3.24 to 3.64v (approx) into the gate.

3) Since the voltage between the gate and source is swinging, so it the resistance between the Drain and the Source.

4) The series of R4, R5 and the resistance from the FET creates a voltage divider from the attached +9v that replicates the original signal and amplifies it.

My question is if the input signal is swinging between 3.24 to 3.64v and the maximum at the disposal of the amplification from the second voltage divider is 9v, how does the AC side of it separate after the FET so the 200mv can be amplified up to 30x rather than just under x3 if all 3.44v DC were still with it? (since the cap c4 should be seperating out any DC (if im correct))  if any of that makes sense.

I know my explanation is very basic but im just trying to get across whats in my head.

Thanks!

[Mike Burgundy]

There's many much more knowledgeable people around who can give a better explanation, but it may help to think of the MOSfet as a variable valve. It opens up or closes, depending on the control setting - which is the gate. The bias voltage sets the valve half-way open, the signal then modulates that up and down. This way you have the maximum swing in the stream through the valve. Ideally, the extremes are totally off, and totally on. Beyond that lies distortion - it can't turn on or off MORE, so the signal is clipped.  Does that help?

[R.G.]

I've been trying to get around MOSFETs as a means of amplification of a guitar signal and everybody around heres been really helpful but I've got a question or 2 if anyone is able to help?

I'll use Jack Orman's Mosfet boost as my reference.

It would probably help you to go read http://www.geofex.com/Article_Folders/mosboost/mosboost.htm, where I talk a lot about the hows and whys of mosfets as small signal amplifiers. There's a whole lot of how this works in that article.

1) R1+R2 create a voltage divider that sets the dc bias to 3.44V

Hmm. R1 and R2 make a reference voltage of 9V * R1/(R1+R2), or 5.56V. The gate has to be higher than the source by at least the threshold voltage to make the channel conduct at all. As noted in the mosfet boosters article at geofex, the BS170 has a threshold voltage which ... varies. For the BS170, it's 0.8 to 3.0V, with 2.1V being "typical", whatever the manufacturer meant that to mean.

As soon as you put more than the threshold voltage on the gate-source, current flows. The gate is an open circuit, so the DC voltage at the gate goes to 5.56V, bango! as soon as you apply power. The gate-source goes to 5.5V instantly because that 100uF cap on the source holds 0V, and has to be filled up to some voltage by pumping current into it. So for an instant, the MOSFET has 5.5V across the gate-source, and starts dumping current into the C5 cap as hard as it can.

AS the voltage on the cap rises, so does the current in R5, by ohm's law. The voltage accumulating on the source offsets or "cancels out" some of the 5.56V gate voltage. This voltage rises until the source is high enough that the gate-source voltage is ...just...barely... enough to support the current needed to hold the source there. It's a DC feedback situation. We already know what this will be. The BS170 has so much transconductance that a few millivolts of gate-source voltage will hold the source up there. So the source voltage will be somewhere between 5.56V -0.8V = 4.76V and 5.56V-3.0V=2.56V, those being the limits of the Vgs threshold. And "typically"   it will sit at 5.56V-2.1V = 3.46V.

At this point, the current through the source resistor will be between 1.8ma and 0.95ma, with a "typical" value of 1.3ma. The same current flows in the drain resistor, so the drain sits at 9V minus these amounts, or between 6.44V and 4.14v. Note that if the drain is at 4.14V, this is the same condition that makes the source be at 4.76V. Clearly that's impossible. What really happens is that the MOSFET has saturated, and cannot amplify. Typically, the drain will be at 9-3.46 = 5.54V.  So even for new, good devices, some adjustment of the bias voltage may be needed.

But let's say it's typical, and the source sits at 3.46V, the drain at 5.54V.

2) The Guitar's AC input (lets say 200mv peak to peak) "latches" onto the DC Bias and then caused the bias to swing from 3.24 to 3.64v (approx) into the gate.

The incoming signal is blocked for DC by a cap, but the cap rapidly becomes a "short circuit" at AC frequencies abover the low frequency rolloff of 1nF and 10M. This is F = 1/(2*pi*1E-9* 10E6) = 7.96Hz, so let's call it a short circuit for guitar signals. The bias voltage rules for DC, but the incoming signal can push around that wimpy 10M resistor easily; the incoming AC signal is **added** to the DC bias voltage and wiggles it up and down. The gate is ("typically", remember) sitting at 5.56V, and so it wiggles up to 5.76 and down to 5.36 around the 5.56V DC bias.

3) Since the voltage between the gate and source is swinging, so it the resistance between the Drain and the Source.

Yes!
4) The series of R4, R5 and the resistance from the FET creates a voltage divider from the attached +9v that replicates the original signal and amplifies it.

Yes. Mostly. It's easier to think of the channel being a voltage controlled current source, but that is kinda what happens.

My question is if the input signal is swinging between 3.24 to 3.64v and the maximum at the disposal of the amplification from the second voltage divider is 9v, how does the AC side of it separate after the FET so the 200mv can be amplified up to 30x rather than just under x3 if all 3.44v DC were still with it? (since the cap c4 should be seperating out any DC (if im correct))  if any of that makes sense.

Well, the FET thinks all this is DC, not AC and DC. It is so FAST!! that the signal+DC bias just looks like a slowly changing DC to it. It can move in sub-nanoseconds. The audio signal + DC is like watching paint dry to the MOSFET.

Here's the way to think of what goes on. The BS170 has a forward transconductance of 320mS - which means "320ma change of current through the drain for every volt of change between gate and source". The gate is already swinging +/-0.2V from signal, so the drain-source channel is trying to change the channel current from its "typical" value of 1.3ma by +/-(0.2V)*(0.32A)= 0.064A, or 64ma. This is clearly impossible. The channel is banging open and shut like a door!

Actually, it's not. I misled you into ignoring that 5K gain pot.   It will distort like crazy if that pot is set to 0 (wiper at the high end). That's the same condition I just described. The gain with the pot set to be a short circuit is 0.32A/V*2700 ohms, or 864 (!). By rotating the pot so it has more and more resistance, the gain comes down from 864 to 2.7k / (2.7k||5k) = 1.54. You get any gain in between.

The drain is wiggling up and down because it's letting varying amounts of current through to the source. So there is an average DC level on the drain, and a varying up-and-down wiggle on it from the gate making the current in the channel vary. C4 acts just like C1, in reverse. It is an open circuit to DC, so the average DC level on the drain can't get through it at all. But its impedance to AC drops dramatically with increasing frequency, so anything after it sees just the AC part coming through C4.

Does that clear it up or muddy it more?

[Dylfish]

wow guys thanks for taking all that time. Ill get home tonight and give it a good read through again and go from there.

I'll have a look again and tell you how I go

Thanks so much

[Dylfish]

OK, so over a year later i've decided it's best 1 get back onto this! Ive read over that article every night for a few weeks and im getting closer and closer to latching on, Although I do have a quick question.

If we have a FET with a transconductance of approx. 320 and we are only drawing 9ma from the supply we can only get the below from the battery before going between cutoff and saturation.

For 1 volt above Vth

Theoretical Max = .320 x 1v = 320ma
Supply Max = 9ma therefore 9 / 320 = 0.028v

0.028v will throw the FET straight to saturation and therefore clipping. If we are feeding a guitar input anywhere between 100mv and 500mv into the gate, Won't we be clipping the crap out of the signal straight away?

[R.G.]

If we have a FET with a transconductance of approx. 320 and we are only drawing 9ma from the supply we can only get the below from the battery before going between cutoff and saturation.

That statement strikes me as odd. I would say it another way.  the MOSFET having a transconductance of 320 mSiemens is not related to the current drawn from the power supply. If we *WANT* only 9ma to come from the supply, then, as you say below:

For 1 volt above Vth
Theoretical Max = .320 x 1v = 320ma
Supply Max = 9ma therefore 9 / 320 = 0.028v

Yes - for a transconductance of 320mSiemen, you only need 28millivolts above Vth to get your 9ma.  As a practical matter, small signal MOSFETs either have quite low transconductance, or they bias only a few millivolts over Vth.

0.028v will throw the FET straight to saturation and therefore clipping. If we are feeding a guitar input anywhere between 100mv and 500mv into the gate, Won't we be clipping the crap out of the signal straight away?

Yes, with some conditions on it. For that to happen, you have to have the source held rock solid at some fixed voltage, perhaps ground, with no source resistor to provide feedback. If that is true, you can get the gain of the MOSFET stage from the transconductance and the drain resistor. For a stage with a specified transconductance, the gain is always the transconductance times the load resistor.

In this case, the load resistor would be close to 4.5V (half the power supply for a 9V supply) divided by the idle current, or 4.5ma (assuming you're biasing it at half the peak current of 9ma), or 4.5V/4.5ma = 1k .

The gain will be 1000 * 0.32 = 320. And yes, an input of 100mV to 500mV will bang it against saturation and cutoff. 

You - as the designer - have several options here. You can let it bang against the supply, as distortion is one of the objectives of a high gain stage. You can insert some source feedback to lower the gain in the same way that an emitter resistor lowers the gain of a bipolar transistor. There are some situations where lowering the drain resistor to lower gain might be useful. You might even want a pot ahead of this so that you could adjust the input level. You might want some source resistance to stabilize the bias point in the face of varying transconductance from different MOSFETs, and then to bypass part of the source resistance to vary the AC gain while leaving the DC conditions static. You might note that there's plenty of gain, even at low currents, and choose to run the stage at 900uA by changing the drain, source, and biasing resistors to get the lower current, while still using the drain/source resistor ratio to get some specified gain.

It is, as they say in the military, a target-rich environment. 

[Dylfish]

Just a question or 10 about negative feedback.

From what I've read the value of vSource is vGate - vTh.

Without a Source Resistor
Vth = 2v
vGate  = 5.5v
= 3.5v (Over Threshold) x .320
= 1.12A max able to flow (Obviously due to FET constraints)

With a source resistor
Vth = 2v
vGate  = 5.5v

vSource = (vGate - vTh)
= 5.5v - 2
=3.5v

vGS = Gate - Source
= 5.5 - 3.5
=2v

Since the voltage on the source resistor has cancelled alot of the voltage out, this allows the change in the transistor to be controlled by the input signal itself. My question is if VGS is sitting right on the threshold, only the positive side of the sinewave on the gate will provide amplification and the negative will go below the threshold and cutoff.

Am I on the correct track or really really really off? Do i have to offset it a little bit to allow both sides to amplify?

RG, that last line of yours makes me want to watch Top Gun for the millionth time...

[R.G.]

Since the voltage on the source resistor has cancelled alot of the voltage out, this allows the change in the transistor to be controlled by the input signal itself. My question is if VGS is sitting right on the threshold, only the positive side of the sinewave on the gate will provide amplification and the negative will go below the threshold and cutoff.

Am I on the correct track or really really really off? Do i have to offset it a little bit to allow both sides to amplify?

You're on the right track, and very close to the answer. I'm going to overexplain this, so pick out what you can from the thoughts.

We've established that the MOSFET, whether its source is grounded or connected to a BFC paralleling a source resistor, is turned on enough to let some current flow. The amount needed to turn it on is the big lump of Vth plus some additional amount to let the current flow, that additional amount being Id/gm. In the example case, where we are biasing at about half the (remaining) power supply voltage across Rd and drain-to-source, that's in the range of 14millivolts.

Philosophically, we have picked a voltage we want across the drain-source and Rd (and probably Rs as well, but that doesn't affect the AC workings) and also picked a current we'll let flow, perhaps for power reasons, perhaps for other reasons. Once we do that, the drain resistor is determined, as we have picked both the voltage across it and the current through it for idle conditions.

In doing that, we have also picked the amount of "excess" Vgs to make the idle current flow, because the transconductance gm is picked by the choice of the MOSFET device. And that forces the bias voltage, which is Vsource + Vth +Vgs(excess) to be picked.

If we did the math right, Vsource sits at the voltage we intended for the DC negative feedback, Vdrain sits at half the remaining voltage for AC signal swing, and Vgate sits at Vth plus a hair, that hair being Id/gm; as we've seen before, this is going to be millivolts because of the high transconductance in terms of amperes per volt.

There is already an offset on the Vgs voltage. It's just enough to make the voltage across drain and source balance the voltage across the drain resistor somewhere in the middle.

So incoming signal can freely move the gate voltage up or down by enough to make the MOSFET turn fully on - Vds = about zero, and all the voltage across Rd, or fully off, Id=0. That idle "excess" Vgs is what lets you amplify incoming signal without amplfying only the top half. The degree of movement up versus down on the drain signal is set by the fraction of the available power supply voltage across the drain resistor versus the Vds, and the amount of AC signal movement on the input that drives the drain to saturation versus cutoff is the inverse of that,  driven by the value of Id/gm.

You're right in that the Vgs is sitting at Vth - but it's really Vth plus a gnat's eyelash, and the full range of AC signals to drive the drain from saturation to cutoff is two gnat's eyelashes. This can actually be accounted for in the math, but the equations then have to include Vgs as something like (Vth+Vactive), where Vth gets you to the point where ID is zero, but even one nanovolt more makes the channel conduct.

The symmetry of the

[Dylfish]

This is all making a lot more sense now, the only issue is how can we place a larger input signal (100-500mv)  on the gate (either straight from a guitar or a second stage) without throwing it into cuttoff or saturation? Is it a matter of drawing more supply current to increase the volts needed or is there something else? Cheers
Dylan

[R.G.]

There are two ways - lower the gain by using an unbypassed source resistor, or raise the available output swing by using a (much!) larger power supply.

If you think about it, the reason an amplifier limits - either saturation or cutoff - is that the input voltage times the gain drives the output to be bigger than the output can swing. You can fix the input range by making the forward gain smaller. This allows a bigger input voltage before output limiting. In the case of simple MOSFET gain stage, you can do this most easily by introducing an unbypassed source resistor. This lets the source follow the gate up and down to some extent, and so invalidates the idea that the source is held fixed in voltage. Now the gate can move more without making the output clip because the source moves with it to some extent. There are other ways, but this is simplest.

If you think about it, making the drain resistor zero and completely un-bypassing the source resistor makes it into a source follower, and then the gate can move nearly the entire power supply without clipping the output - but the output now has to be the source, and gain is only one.

[PRR]

> how can we place a larger input signal

This is BASIC audio systems.

If signal is too small, amplify it.

If signal is too big, attenuate it.

You "can" do audio with high-gain black-boxes and resistor pads. Don't need to get down-and-dirty with device parameters.

Gain-up until it overloads, take out that last stage and put in a pot, then gain-up until you get the output you need.

_______________________________

In JFETs/MOSFETs, Vto is pretty-near the maximum signal you can put into the naked device.

This is awkward because Vto is very variable.

As the master says, you can take a Vto too small, then split the signal with an unbypassed source resistor; since you normally "must" have a source resistor, this works well.

Vacuum tube triodes have a "Vto" proportional (Mu) to plate-cathode voltage. So you'd think you could select B+ to get a good input. But usually B+ must be selected for desired output. Or just because it is handy.

Vacuum tube pentodes have a second fudge-factor. Vto is proportional to G2 voltage, not plate voltage. So there is some trade-off possible.

But mostly you pick an input stage which has "plenty" of input room, then add another stage(s) until you get enough output signal. Single-device high-performance amplifiers are mostly lucky accidents.

[Dylfish]

Thanks for persisting with this guys. I'm still lost on the input signal getting clipped on the gate. I've tried to illustrate what i'm thinking so you can see how my minds going.



if the transconductance doesn't change (eg 320) the only way to make this signal 150-200mv signal to pass cleanly would be to increase the available current thought the VDS channel, right? to get something even at around 150mv you'd need to have 50ma or so through the drain/source?

50/320=0.156v

for some reason I feel I'm missing something very fundamental thats pushing me off kilter.

[PRR]

> if the transconductance doesn't change (eg 320)

320 whats? Mhos? nanoMhos?

> 50/320=0.156v

Maybe my sliderule needs greasing. But assuming "microMhos", I get half a milli-Amp, not 50mA. Are there milliMhos? Can you get 300 mMho at a battery-friendly current? I guess at 50mA it's not implausable; but 50mA current drain can be used in better ways.

Let's get silly. Say you have a device with infinite Gm. The maximum input is I/infinity or ZERO input. How can you use it?

Put a cathode (source) resistor under it. Don't AC bypass it. DC-drop half the peak-to-peak input signal.



The FET will go from idle current to zero current to twice-current and back. If you doone it right, it just touches zero current so won't clip. (In a real world you want some safety factor.)

The device current is high for good load drive but low for low power consumption. In 9V work, "1mA" is always a safe first trial value. It isn't a lot of current, and it leads to ~~4K Rd which will easily drive our typical 50K audio loads.

The circuit as-shown has practical problems. Can you set the gate precisely enough for 0.1V across Rs? But for now assume we might.

[Dylfish]

Sorry Paul I haven't had time to digest what you've written but from R.G's article it is 320 milliseimens.

[Dylfish]

ok so from what I'm reading we need to have the Value of VS to be approx. 1/2 (or a smidgen more) of the "intended" input voltage.

I am understanding that assuming 1ma that

Rs = 0.1 / 0.001 = 100 ohms
Rd = 5v / 0.001 =  5k ohms (Why have we got rd down as ~4k?, Just wondering. Im obviously missing something)

That combined is 5.1v, I assumed that the total should be 9v. Where am I missing this?

Gain  = -Rd/Rs = 5000/100 = 50x (or 40x as per 4k Rd)

0.2v in x 40 = 8v Out

From this i would assume that you would then bias your gate for Vs = Vg - Vth to suit the other parameters. Whats lost me if i've been reading/"interpreting" from the above that the Ids /  transconductance would be the maximum the input signal would be able to swing without it clipping. (in this case of 1ma , 1ma/320ma = 0.003v, which comes in way short of the .100v i would be expecting.

Thanks for all your patience.

[PRR]

> Ids /  transconductance would be the maximum the input signal

An unbypassed source resistor *reduces* the Gm. To 1/Rs. 100 Ohms is 10,000uMho, or using newfangled units 10 mS.

1mA/10mS = 0.1V
0.1V*10mS = 0.001A = 1mA

> Why have we got rd down as ~4k?

If there were zero losses in the source network, we could swing from zero Volts to +9V. The midpoint is +4.5V, a number we see a lot. And that will work.

For my "infinite Gm" device we stuck 100 Ohms underneath. Drops 0.1V at idle and 0.2V when current is maximum and drain is lowest. So we really swing 0.2V to 9V, and aim at 4.6V idle. 4.4V drop in Rd.

That's assuming the MOSFET will pass 2mA with zero volts across it. It can't. I'm not sure how much loss. Taking "about 1V" wild-guess we swing from 1V to 9V and of course idle near +5V, or 4V drop in Rd.

> article it is 320 milliseimens.

I see. Read but verify.

ALL devices vary their Gm. Proof: Gm must go to dead zero at dead-zero current. And there's no specific current where Gm pops-up from zero to non-zero. Gm of a junction transistor is reliably proportional to current over a huge range. FETs show geometric effects (similar to water in a sluice) so there's an exponential relation. But still, higher current is higher Gm, and vice-versa.

R.G. grabbed the only value on that datasheet, which happens to be taken at _200mA_. This is useful for many high-current jobs. If you plot out to 2 Amps the Gm goes to ~~250mS (effectively there is a 4 Ohm resistor inside). So using "320mS" is close-enough for currents from 200mA to 2A, a wide range.

http://www.fairchildsemi.com/ds/BS/BS170.pdf

But we know Gm is zero at zero current, and 1mA is a long way down from 200mA, so it might be less. If it were a junction transistor it would be 200 times less. FETs go more square-root, maybe 14 times less, and maybe not. (Most power MOSFETs are really a hundred small device "cells" in parallel, and it is possible that 99 are cut-off at 1mA and one still works great.)



Squint at the data. The "Transfer Characteristics" curve IS the transconductance, you just have to figure the *slope* of the line near your desired current. On top we see it is better than 330mS for all current above 200mA. But below that it bends. Squint harder. The resolution of the available PDF is 9mA per pixel, so information about 1mA current is very dubious. (While the paper-original was better, we still mis-trust plots at 1/2000th of the full scale, nobody works that exactly, not even the junior TI engineers.)

Still, just for fun, I plotted a yellow line tangent to the blurr of the curves near where they vanish into pixel-haze. 18mS. While that is foggy in both slope and current value, it is clearly not 320mS at low current.

I think at/near 1mA the Gm is nearer 10mS-20mS than 320mS. And you should be using the low value in your ~~1mA figurings.

[Dylfish]

Just as a test I'll is what I think i've learnt has got me anywhere

Assumptions
Vcc = 9v
Max Guitar Input Signal  = 800mv Peak to Peak (I know, Large, but a test none the less)
Idle / Bias Current Desired = 4ma
Vth = 1.65v (Made this up as a test value)

Therefore

Vs = 800mv/2
Vs = 400mv

Rs = 0.4v/0.004a
Rs = 100 ohms

Vg = Vs + Vth
Vg = 0.4v + 1.65v
Vg = 2.05v

Vgs = Vg - Vs
Vgs = 2.05v - 0.4
Vgs = 1.65v (Vth...Suprise!)

Therefore the remaining "swing room" is:
9v - 0.4v = 8.6v
and to bias it midway for maximum swing
8.6/2 = 4.3v

Therefor again, using the previous assumptions...
Rd = Desired voltage drop / Id
Rd = 4.3v/0.004
Rd = 1075 ohms

since Rd is about 10x Rs, we should get about 10x gain on the input signal. Therefore a 800mv signal should be sitting at around 8v, when we have an available 8.6 clean swing room.

I take it is we bypass the Rs resistor then we have a large resistance which can reduce this factor of 10 further? Eg.  Rd = 10k and Rs(b) = 5k then we get a gain of 2?

Although i hope this is closer to the answer im still a little stuck on how the available gm is having an effect on gain? unless I've just explained it and misinterpreted it's workings?

Cheers

[Dylfish]

Sorry to be a pain but can anyone confirm this is correct?

[PRR]

> 800mv Peak to Peak (I know, Large, but a test none the less)

Not large if you are asking about clipping. 1V p-p is also a good reference for hard-plucked guitar.

> Rd is about 10x Rs, we should get about 10x gain

Here is where you must add-in 1/Gm. 20mS is 50 Ohms. (1075)/(100+50) is gain of 7.

This should be further adjusted for actual load. If load is 470K it vanishes in the haze. But note that 30 feet of guitar cable is 1,000pFd which is 10K at the top of the audio band, 20K top of guitar zone. Some stuff has 20K-10K input impedance (particularly studio line inputs). OK, 10K load on 1075 Ohm source impedance is only 10% or -1dB and no big deal.

[Dylfish]

Hi Sorry just another question for you guys =/

since gain with and Unbypassed source resistor is -rd/rs, then is it safe if assume that if we have a bypassed potentiometer as a gain control the formula would be

-Rd/(Rs||RsByp)

Where if the mosfets bypassed source resistor was a pot it would be anywhere from. 2.7/(2.7k||5k) = 1.54x to any point close to 2.7/(2.7k||50ohm) = 55.1x

If this is the case is it better to have the Rd and Rs at equal values to allow for a larger swing so the minimum swing would be 2.7/(2.7||0) and close to unity gain when the pot is wide open?

Lastly if I put a put a resistor in series with a pot can i then control the minimum resistance (or set the maximum it could go to)?

Cheers.