proco rat clone - very low distortion level

[stevebeige]

Hi. This is my first post. I built the 'rodent' version of the rat from pedal parts uk and have sound but the distortion is only pushing a slight break up on max. It worked perfectly on the breadboard.

Incidentally, I'm just using 2 diodes (no switching).

My voltages at the LM308 chip are as they should be (I'm running off a 9v supply from a pedal power 2 which has been tested at the terminals of the battery snap 9.05v)

1. 8.34v
2. 4.48v
3. 4.05v
4. -
5. -
6. 4.48v
7. 8.99v
8. 4.57v

The jfet is a 2n5458 with the following readings

D=8.99v
S=1.84v
G=0.00

Both diodes read 0.623 on the diode setting on my multimeter which I believe is also ok.

I'd really appreciate any suggestions for what to try here.

Thanks

[Kipper4]

Did you double check the dist pot connections
The op amp should have a gain of 101. 
It should as you know from bread boarding it have a nice amount of dirt when the pot is flat out.

[stevebeige]

Did you double check the dist pot connections
The op amp should have a gain of 101. 
It should as you know from bread boarding it have a nice amount of dirt when the pot is flat out.

please excuse my noob questions. Can you clarify what exactly I should be checking for with the dist pot? I reflowed all the joints at pot and on the pcb but still the same.

I have the chip in a socket. I'm not sure, at the moment, how to test the op amp's gain. I'll look into it.

Yes, when it was breadboarded the distortion was ripping my face off from about the half way mark onwards.

Thanks for your reply

[Kipper4]

The op amps gain is set by the relationship between the op amps input resistor R2 and the distortion pot 100k.
At maximin gain that's 1k x100k +1 . I'm sure I haven't put the correct calculus here. But that's how I do it for rough calculus.
So like you say it should be face melting distortion.
If you have a multimeter you could check that the pots working ok. Lug 1 to 2 turn the pot with the meter set to the 200k resistance setting (mines not auto ranging) then do the same with lugs 2 and 3.
You should see the resistance getting bigger and smaller as you turn the pot with the probes on the lugs.
Did you make a kit?
Probably best as well to go to the "what to do if it doesn't work debugging" thread and give us some more info.
Welcome to the forum by the way.

[stevebeige]

Thanks for the welcome!

I've had a little look around on the maths for the gain and understand how it's calculated. I have checked the pot with the DMM as you describe and it seems to work fine up to 93k and back to 0 with lugs 1+2, 2,+3.
It wasn't a kit. I sourced the parts myself and just bought the pcb separately. I'll have another look at the 'what to do if it doesn't work debugging ' thread and see what else I can do.

Any other suggestions are absolutely appreciated

[Kipper4]

Come back please with more info as described in the debugg thread. Pop some pictures or links to pics in the post so we can see what we are dealing with.
It might be really obvious just from a picture.

[duck_arse]

measure the voltage at R12//R13. it should be about 2V8. this voltage is providing bias for the jfet gate, which therefore, should be higher than 0V00. you may have a short to ground somewhere between the gate and R12.

[ashcat_lt]

The op amps gain is set by the relationship between the op amps input resistor R2 and the distortion pot 100k.
At maximin gain that's 1k x100k +1 . I'm sure I haven't put the correct calculus here.

Not even close, actually.  This is a non-inverting configuration.  The gain is essentially the reciprocal of the ratio of the voltage divider in the feedback loop.  This is, of course, frequency dependent, but in the upper midrange the max gain is quite a bit more than 100.

OP - check the connections from the feedback loop to ground.  I'm not going to google for the part numbers.  There's two caps, each in series with its own resistor.  If these don't ultimately hit ground, you can only kind of accidentally get any gain.  Seems a little strange that both would have failed, but...  You obviously can't measure continuity through the caps, so you'll have to visually inspect and kind of deduce.  Double check those R values, if you've got xKs in there, could also cause the problem.