jfet splitter schematic help

[yuka42]

Hi everyone!  First of all, let me say thanks to everyone here for all you've taught me.  I've learned tons.  I've got so many projects floating around my head it's ridiculous.  I'm really new to this, but I'm trying and have built a couple pedals already with success.

I'm trying to figure a circuit based on (read exactly the same) as the AMZ Jfet splitter, but with an optional stereo input, transformer isolation, and added phase flip and on/off switch for each output.  Please let me know if using this schematic is against forum rules.

I've drawn up a schematic free hand (because I'm super slow at Diptrace and a pencil and ruler is easier on my brain). 

Would someone smarter than I like to have a look and let me know if this will actually work?  Out 3&4 would be duplicates of Out 2. 

I plan to install this into a pedal board build that I also have in the planning stage.  I wanted to get the electronics worked out before I started the woodworking.

Thanks very much.

Ryan

[Transmogrifox]

First off -- really nice artwork .  I'm a fan of well-done hand drawn schematics.

I don't know what transformer you intend to use, but if its DC resistance is much less than 1k you'll cook your JFETs (it also makes the parallel 10k pointless).  At the very least it won't be doing what you expect.

The other problem I see is with your V/2 biases between inputs there is bound to be several to 10's of mV difference between the two gate voltages and you will get audible switch pop when you switch stereo/mono -- not to mention the sudden jump at the gate of Q2 from wherever it has floated during the time the switch contact is flying (unless you have a make-before-break switch).

I suggest these changes:
Put the transformer winding in the JFET drain.
Put a resistor in the source of a smaller value (like 3.3k or something), and same in the drain so you get a unity-gain inverting amp.  Then the parallel transformer is supposed to drive a load that is more than 10x your drain resistance (like >33k, you can probably even use this as a DI box to a mixer).
To get the right phase relationship, you flip transformer windings (looks like you can already do this as drawn--I assume that's a DPDT SW?).

Instead of resistor divider bias on FETs, tie the inputs to ground and allow it to self-bias by tweaking the source resistor.  The only thing is to make certain drain resistor equals source resistor if you want unity output.  You can get a signal boost, obviously, by changing that ratio.

In this case, don't bias according to drain voltage -- the transformer probably looks like a DC short, or maybe is 100 or 200 ohms DCR.  Bias by source current, probably aim for 200-400 uA to drive a 10k load at 1Vpp.  I estimate you're looking at 3.3k in drain and source, and maybe 1VDC at source with something like a 2N5457. 

Then when you have the JFETs inputs ground referenced, no switch pops.  I do still recommend the input decoupling cap and Rb pull-down -- you might want to change that to something like 2M instead of 10M.  Too big of a resistor and you may as well not even bother.

Also it would be good to have a pull-down resistor on each side of the switch at Q2 if you have any concern about switch pop.  Static charge can build at the gate of Q2 and pop when you switch it in.  Likewise if you moved bias from C3, static charge can build on C3 and pop when you switch it in.

Finally I don't get the ground switch thing.  Is that an on/off switch or intended to be a ground lift?  If ground lift then you still can't disconnect one end of the transformer for the sleeve.  It should be a simple open or closed from sleeve to ground.  As drawn it just breaks the signal path and works like an on/off switch.

[yuka42]

You rock man!  That's exactly the answer I wanted.  Something to challenge me a bit.  Thanks for the comment on the drawing.  My dad is a structural steel draftsman and draws it all by hand.  Guess it kinda rubbed off.  He'd give me hell for my letters and numbers tho.  haha.  Anyway, It'll take me a bit to process, but I can answer a few of your questions.

I was going to use the Edcor WSM10K:10K transformer but they've deleted it off their site.  Might have to find another source.  I'd rather not use the Mouser one for it's frequency response.  The Edcor has a DCR of 252 Ohms...so..I'll have to process that one.  The JT-11P-1 has a DCR of 1.5K so it would work, but $$$.  You're saying to omit R5 - 10K?  And C2?  The AMZ has a 1uf cap inline with the output and a 100K resistor to ground.  I assume for a DC filter?  Should I add that after the transformer?

http://www.muzique.com/lab/splitter.htm

I wasn't sure about popping on that stereo/mono switch but that makes total sense.  Thanks for the solution with pull down resistors.

The transistor is the MPF102. 

All of your suggestions are starting to make sense after a couple read throughs.    That is a DPDT switch for a phase flip on the output.  And that end switch is meant as a ground lift but it's probably unnecessary because the transformer is there to isolate the ground already. 

The 10M resister at R1 was from the AMZ schematic.  I think it's to retain high end in the guitar signal....most other circuits I've seen call for 1M so you're probably right..but I laughed at your comment that you might as well not bother.     Would this resistor essentially set the input impedance? The load for the guitar? 

I'll have the process the jfet biasing thing...something I need to do more reading on.  It sets it's optimal operating range for the jfet does it not? 

Thanks again.  I'll work on it some more and get back...

[yuka42]

Soooo....I took another stab...I plan to breadboard this and play with values, mostly so I can learn and figure these formulas out for myself.  Math was never my strong suit. 

Here it is.  Is the biasing section right in what you meant?  Sending the Gate to ground like that with the 1M? 

If I actually did want an on/off switch for each output where would you put it?  This will sit in a studio situation and will likely be hooked up to a few amps at once.  Might be nice as a switcher.

Thanks again for your reply.

[PRR]

You *must* put a 10u cap between the FET and the transformer.

The FET has to have DC voltages on its pins. Putting *any* DC current through a transformer is bad for bass. While there are some transfos designed to not-suck-bad with DC in them, the parts you consider are not them.
__
I respectfully disagree about self-bias and taking the load at the Drain. Tying Gate to +4.5V, the Source can swing nearly 4V either way. With self-bias the drain swing must be half at best, and probably much less than half because the Vgs(off) spec on MPF102 (any JFET) is so wide.

With Gate at +4.5V and Source assumedly near 5V-6V, and MPF102 good for at least 2mA (Idss), we want to bias near 1mA so Rs must be like 6V/1mA= 6K. 99% of time a 4K7 will be fine. This is sufficiently lower than nominal 10K load that gain and swing will be good.

I do not know what the C2 R11 thing is on the outputs. We do not need to block DC here. If the 100K is to bleed the 1uFd, surely it goes to the other side of the floating winding, not to ground.

Two "Vref" Gate-bias sources will never match, and will "pop" as you switch between. Make one Vref with 100K+100K+10uFd, and take it to the various Gates with separate 1Meg or 10Meg resistors. JFET gate current is so low that the stray drop in 1Meg should be no-pop. With the fatter JFETs, 10Meg may be an audible pop, but the '102 shouldn't be a problem.

[yuka42]

Thanks very much for the reply PRR.  More brains the better.  I've seen some of your other posts and I've learned a lot from them. 

The 10uf cap before the transformer makes complete sense.  I was unaware DC would effect a transformer.  Thanks for the lesson!

The C2 R11 was a DC blocker yup...ripped from numerous other schematics I've seen.  I will remove it and do the above mentioned.

After a bunch more searching and reading about transistor setups, what you're saying makes sense.  This would be a "common drain" setup if I'm correct and gives more headroom because of the greater swing...is that right?

What I'm a little unclear of is the use of the 10uf cap in your Vref voltage divider for the gates...where would that be placed and what is it's purpose?  Bear with my ignorance please...  I'm trying to understand the purpose behind everything.  Thanks again.

Ryan

[Transmogrifox]

Here are a couple ideas I had in mind.  Please don't be insulted by my bad hand-drawing skills.


The top is probably closer to what PRR was suggesting.  Notice I leave a lot incomplete -- it's just a way to illustrate a concept.

The bottom is what I had in mind in my first post.  PRR brings up a valid point about DC in a transformer winding.  I just assumed a transformer able to handle 200 uA.  I really don't think you need more than 200 uA unless you're driving several volt signal levels.  200uA gives you [EDIT]*2V* peak into a 10k load before pinch-off clipping. [EDIT]PRR points out below that I have neglected the 3.3k parallel load stealing some of this: 3.3k||10k = 2.48k giving 496 mV, so not quite enough.  You probably need something like 200 ohms in each resistor location on option 2 to get enough drive for 10k load.  By that time the transformer is eating too much DC current to be reasonable so now you're back to the original design but with a much smaller source resistor. [/EDIT]

Also assuming a a relatively low DCR transformer you can see the DC voltage will sit pretty close between 8 or 9 volts.  The parallel 3.3k just matches the AC load so you get approximately unity gain.

I think either route will work.  My first suggestion was aimed at solving 2 problems:
1) Switch pop
2) Excessive (like 10's of mA) DC current in transformer winding.

2N5457 @ 200uA is about 700 mV per datasheet.  If you use a different FET that may change, but either way you only need a 4V swing, and a 200 uA bias will give you at least that much into a 10k load.

Option #2 is more like a tube power amp output.  Option #1 is more of a direct application of the AMZ buffer you referenced.

[Transmogrifox]

Thanks very much for the reply PRR.  More brains the better.  I've seen some of your other posts and I've learned a lot from them. 

Me too.  When PRR chimes in it's time to pay attention

[PRR]

> hand-drawing skills.

The drawing is very fine.

I'm having trouble with the math though...

> 200uA gives you 10V peak into a 10k load before pinch-off clipping.

I get 2V peak for 200uA in 10K.

Being resistance loaded, we must also account for audio current in the "DC" resistor. Assuming 3.3K, then we are really driving 2.48K (3.3K inside, 10K outside). Still assuming 200uA idle and peak, that's 0.49V peak output. Which is very marginal for raw guitar and will clip the output of many pedalboards.

I was figuring with 9V supply we would hope-for (not get) 4V peak. If the external load were 10K, with resistance coupling the resistor should be 1/2 to 1/10 the external load, 5K to 1K. As we don't need 4V peak we can take the high end of this range, and 3.3K seems fine to me. 4V across 2.48K is 1.6mA. That's the JFET idle current. On swing it goes to zero mA and to 3.2mA.

As a low-Idss MPF102 can be as low as 2mA, we can't be 100% sure to get 3.2mA. You can build, play, then cast-out the weaklings, or aim for 1.0mA and know "all" MPF102s will do the 2mA peak. With Source ;around 4.5V, this says 4.5K. If instead Gate is conveniently set at 4.5V, then Source will be 4.7V to 5.5V and we pencil 4.7K-5.5K. This that and the other, I'd just see which medium red-stripe resistors I had "too many" of, 3.3K 4.7K 5.6K 6.8K, and use them.

Side-note: a "10K:10K" transformer is, for mid-frequencies, really reflecting the load on its secondary. In guitar work this is liable to be 50K-1Meg. However it is called "10K" because at the low (and high) end of the audio band its impedance will get close to, then drop below, 10K. On one hand guitar is not full-bass compared to "hi-fi". OTOH there's a lot of small iron which does not even try to cover the full audio range.

I *must* point out that a truly well optimized resistor-coupled JFET "power" amp (that's what it is when you must deliver a strong output with good DC efficiency) is tough. A pre-canned solution like TL072 can give measurably better results with less brain-pain. If unity-gain is sufficient, it is even less parts (no source resistor). I even suspect AMZ has op-amp buffer plans to copy.

[Transmogrifox]

You are correct (as expected), Paul.  The "10V" was a typo, I also calculated and meant to relay 2V, so it doesn't come as a surprise that a number like 10V makes your math hat itch. 

I did, as you pointed out, naively neglect the effect of the 3.3k stealing power from the load.  I don't know whether the OP wants to drive a 10k or just more guitar FX, but it does seem the purpose of a transformer isolated active buffer would be for connecting to a mixer line-in or an audio card for recording.

To get currents on the order of 1 mA, then I would agree we're back to the original design but with a source resistor on the order of 4.7k and possibly a trim pot in the bias to get it centered at 4.5V.  An op amp as PRR suggested is sounding like a convenient solution for this application.

[yuka42]

Great information both of you.  Thank you.  The intention of this device would be as a final stage from pedals to multiple amps.  Much like a Radial JD-7 ish device, only much simpler obviously and less outputs.  The BYOC amp selector uses opamps and transformers, (albeit the mouser brand trans with rough frequency response).  I only chose Jfets mostly as a learning tool for myself to try to understand their operation.  Seems to me it's a more basic building block, but as I'm learning...a little harder to get correct.  I'll probably stick with the jfet design only because I want to see it through and maybe learn a thing or two along the way. 

I like the idea of a trimpot in the bias, if only just for me to understand the relationship of things.  I'll do that in the breadboard build. 

Thanks again for all the help.  I'll rework the diagram and post as I go.