LPM-23 noise gate is not working as expected.

Started by nguitar12, September 18, 2015, 10:37:42 AM

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nguitar12

Hi everyone I just finished my build on LPM-23 noise gate posted on Mark Hammer's web site. It does gating but I don't think it is 100% working as expected.

Here is the project:
http://hammer.ampage.org/files/LPM-23-NoiseGate.PDF

Firstly the decay pot is not working. I don't hear the noise fade out by always instead disappear no matter how the decay pot is setting.
Secondly the threshold is always too high what it mean is when the distortion pedal volume turned up the noise gate will let almost everything pass through and the range of the threshold pot is very small.

As I understand the threshold range of a commercial noise gate pedal should goes from very low (basic gating everything, only letting the peak of hard strum pass through.) to very high (letting everything pass through).

I don't know whether LPM-23 will have such extreme threshold range. I just feel like how the pedal perform now is useless to me so I wonder there are some error on my build.

GiovannyS10

You can show us your real circuit? I had a problem with a noise gate there some years. I put all pots equilibrate but the noise dont gone. So, i found the error, was on my out cable. Its had a problem and made some noise, same with noise gate. Check it and post your circuit pics for we see.  ;) And the majority of noises gone with good cables and connectors. I dont use any gate now, only good cables and i think my sound is better now, principally the sustain.

Good day!
That's all, Folks!

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Mark Hammer

I haven't built the circuit, so I can't guarantee anything about it.  However, since it was scanned from a bound published book with a nice glossy cover, I think it is safe to assume the circuit and layout were tested prior to publishing; especially when one considers the number of complaints they would have received from the local market.

That said, it is entirely possible that a set of errata were published after the book came out.  I had brief access to the book, but nothing else.

The circuit.

1) Are you certain that the pinout on the JFET corresponds to what is expected by the circuit and layout?

2) This could have been an error, but check the parts layout vs the schematic for orientation of electrolytic caps.

PRR

#3
Something is missing at LM324 pins 3 and 12.

Why connect two inputs together, but to nothing else?

I strongly suspect there should be a DC bias in there. By default, I am thinking the +5V bias (what else could it be?).
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PRR

The PCB board appears to show '324 pins 5 and 10 connected together. This is not what the schematic shows.

Crazy thought: there was an older quad opamp with a different pinout. Did somebody draw it for the older opamp, then change to LM324 at the last moment, without checking it out?

While it is very pretty and had a slick cover, I think someone needs to go node-by-node and verify the PCB against the schematic, and the schematic for small critical errors.
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Mark Hammer

Good eye, Paul!  That PCB link between pins 5 and 10 should definitely NOT be there.  Cut it and see if this improves performance.

I should also emphasize that the book and circuit came out long before toner transfer ever existed, so after scanning I flipped the PCB layout to be toner-transfer compatible.

PRR

I think there are more discrepancies. But kin from Texas are coming so I don't want to start a long proof-read.
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nguitar12

Quote from: Mark Hammer on September 19, 2015, 12:07:57 PM
Good eye, Paul!  That PCB link between pins 5 and 10 should definitely NOT be there.  Cut it and see if this improves performance.

I should also emphasize that the book and circuit came out long before toner transfer ever existed, so after scanning I flipped the PCB layout to be toner-transfer compatible.

I did notice that the layout of LM324 is actually mirrored compared to the schematic pin number. I don't know if this is a human error but this is  theoretically acceptable because the internal op-amp is oppositely aligned.

So the pins 5 and 10 on layout diagram is actually pin 3 and pin 12 on schematic, which is connected.