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Matching jfets

Started by JackDaniels, October 11, 2016, 06:51:19 AM

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JackDaniels

I have tested some j201s with this  tester http://www.runoffgroove.com/fetzertech10.png, all Jfest are within specs.
Then I started matching them with R.G. Keens method and readings were typically 0.030V - 0.065V.
My question is, should R.G. Keens matcher results meet Vgsoff values, -0.3V - -1.5V ?



R.G.

The J201 is a very atypical JFET. I'd have to look into it a bit to see if the J201's oddities lie within the normal specs of the (quick and dirty!) JFET matcher.  It's designed to match JFETs to a nominal 10K drain-source resistance for phaser use.

It is true that really identical JFETs would give the same results in any tester, but the sensitivity of the tester may be best for the JFETs being tested. In general, the smaller the difference being squinted by a tester, the more suspicious one should be of the results.

All that's a long winded way of saying I'm not sure without some detailed study. The J201 is a funny JFET, and not what the tester was designed for.

What is the intended use?
R.G.

In response to the questions in the forum - PCB Layout for Musical Effects is available from The Book Patch. Search "PCB Layout" and it ought to appear.

JackDaniels

Basically I'm just studying jfets generally. I know basics but I want to learn more deeper knowledge, i.e. why phaser don't work even it should etc.

This part of Your great article was bit confusing for me:

"The spec for Vgsoff is -0.5 to -4.0. Here's what I measured: Lowest: -1.342V.  Highest: -2.72V"

I was thinking that results from matcher must meet Vgsoff specs, but they don't need to, right?
I understand purpose of matcher and how it works, so that's clear for me.

Let's assume that I want build a phaser circuit. I will first measure Vgsoff and Idss of my J201's to make sure that they meet specs, then try to find good matched sets.
That's all i need to do or am I missing some point?  :)



R.G.

Quote from: JackDaniels on October 11, 2016, 10:40:16 AM
Basically I'm just studying jfets generally. I know basics but I want to learn more deeper knowledge, i.e. why phaser don't work even it should etc.
That's a very good thing to look at. Good on you.

QuoteThis part of Your great article was bit confusing for me:

"The spec for Vgsoff is -0.5 to -4.0. Here's what I measured: Lowest: -1.342V.  Highest: -2.72V"

I was thinking that results from matcher must meet Vgsoff specs, but they don't need to, right?
I understand purpose of matcher and how it works, so that's clear for me.

Let's assume that I want build a phaser circuit. I will first measure Vgsoff and Idss of my J201's to make sure that they meet specs, then try to find good matched sets.
That's all i need to do or am I missing some point?  :)
You're missing some points, but that's OK, the points are well hidden.

First, JFET part numbers have a huge variation in specs. They have VGSoff specs and Idss specs that are interrelated through the channel resistance, and which then vary between part numbers. Part numbers then have overlapping ranges of these three.

For the article, I was speaking of a specific JFET part number which had a specified VGSoff of -0.5 to -4.0. For the JFETs I measured, the range was -1.342V to -2.72V for actual parts. That means that the parts did indeed fall in the range of the spec.

And another subtlety is that I slightly perverted a simple VGSoff measuring circuit to not measure exactly VGSoff below some nanoamperes, but to measure the VGS for a channel resistance of about 10K, which happens to be a decent value for many phasers. So it doesn't measure exactly VGSoff, but as it turns out, the VGS it measures is quite close to VGSoff, and more useful for most of what effects folks want them for.

So far, so good. The matcher is cheap, quick, and useful for what most people want, matching for phasers.

It will happily measure on J201s. However, the J201 is not all that good for phasers. The J201 is an odd duck, even in a flock of oddly colored and sized ducks (i.e. JFETs in general). It's intended for low signal amplification, and has a low Idss (so not much current can flow in it, ever) and a very low VGSoff as well as a high transconductance.  A quirk of semiconductor physics is that these mean it has to have a short channel and other features that make it less well suited to be a wide-range variable resistance, which is what you need for a phaser. You can make it work, but it's not the best choice, depending of course on how you define "best".

Most people building with JFETs want to build either P90-ish phasers or convince themselves that since a JFET biases something like a triode or pentode, that you can drop a JFET into a triode amplifier circuit and have a JFET preamp that is the same as tube sound. I won't address this last here, as I have many times.

But for P90-ish phasers, the LFO is set up for a variation in gate voltage that matches the 2N5295, 2N5485 and 2SK30 family pretty well. The J201 will need a far smaller LFO waveform on its gate to do a resistance sweep, and because of the short channel and small VGSoff, limited signal handling before distortion.

It can clearly be made to work, as some people have, but - well, I think of it as an idiosyncratic choice for a phaser.

Understanding JFETs even to this crude level took me quite a while. There's a lot more that I'm sure I don't know yet.
R.G.

In response to the questions in the forum - PCB Layout for Musical Effects is available from The Book Patch. Search "PCB Layout" and it ought to appear.

JackDaniels

Thank You very much for reply's. Much to learn, but that makes things interesting. Sleepless night with breadboard....  ;)

PRR

> confusing for me: "The spec for Vgsoff is -0.5 to -4.0. ...I measured: -1.342V to -2.72V"

0.5 to 4 is a very wide spread. It means the maker can't really control the product.

Say you buy a bag of potatoes marked "0.5lb to 4lb". Huh?? They can put 3.8 to 4.1 pounds in every bag.

Or lumber. At the fancy lumber store I know just how big a "2 by 4" will be (1.5*3.5!). But I want a cheap chicken shed. I don't need exact-size boards because I will use 13 or 21, whatever it takes to cover the wall. Here in the Maine woods there's a lot of guys throwing logs through saws. I can ask for boards right off a log without any fancy trimming. They will vary from 1" to 6", however wide the log was at that point. (I won't get any >6" because he can sell wide boards for more.)

So if I am offered "1 inch to 6 inch wide boards", and actually get all 3 inch to 5 inch, it "meets specs". And I am actually happy not getting a lot of extreme sizes.

Likewise if spec is 0.5 to 4, and the lot you get is all 1.3 to 2.7, you should be pleased.

Yes, if you "needed" some 0.6V JFETs, and hoped to find them in a 0.5 to 4 spec, you would be disappointed. Remember that these wide-wide specs were written so that the maker could sell every non-dead JFET he made. As the process improves, and on good days, 99% of production will tend to lay near what he was aiming for (around 2V), with very few extremes. But a bad day in the fab could yield a boat-load of 1V devices.

There is always a tighter spec. If not in the catalog, call the rep and ask for a quote. Of course it isn't worth the maker's trouble to sort-out except at a much higher price each, and you may not get an extreme spec unless you pre-pay for an entire wafer (must be many thousand devices now) and some fussy processing.
  • SUPPORTER

Eb7+9

#6
the J201 is listed as a general purpose amplifier
nothing funny, or odd about it ...

http://www.jameco.com/Jameco/Products/ProdDS/992505.pdf

if you know what you're doing then it's just like any other jFET

first of all - in phasors there is no DC current flowing thru the jFET when used as VCR
so, Idss values really matter none in terms of being able to carry current in a phasor circuit ...

Idss is only used to give an estimate for Ron (the zero bias channel resistance figure), if the luxury of matching that figure is afterwards available...

primarily - the goal in an audio phasor circuit, or any symmetrically controlled AC resistance application, is to match jFETs MAINLY for their voltage control range

that is, so none of the devices have their useful control range exceeded (and shut off) when operating off a common LFO voltage ... otherwise, your four stage phasor might only be kicking 2 or 3 stages in some range of the LFO swing ... yielding a less-than optimal DEPTH of effect ...

to do this right requires KNOWING Vgs(off) ...

which must be an estimated indirectly // (*!*)

this is because there is NO way to measure the exact spot where something becomes zero on an asymptotic curve
(notice how all Source transfer curves become zero at Vgs(off) ...)

following this crucial parameter, we might want to match for the "on" resistance ... ie., at Vgs=0
(this would apply, say, in the case of a Univibe emulation where the cap values are measured and chosen accordingly)

Ron is defined as Vgs(off)/Idss ... (see AN105 below)

NOW, all this is assuming we want our phasor to work in an even, or at least somewhat deterministic manner
we don't have to have matched VCR resistors to make things work ...
but having matched Vgs(off) and therefore corresponding control range is crucial for having max amount of available phasing from the cascaded circuit

---

a quick goodle search for "jFET matching" will reveal a host of webpages on the subject ...
none of which even graze the surface of how a jFET device works

even university tutorials get this stuff wrong I've noticed ...
in fact, text books in general tend to gloss over the lowly jFET transistor in favor of the MOSFET used in VLSI

so, it's really no surprise why there's so much confusion with these guys
anyhoo ... back to the task at hand

an accurate method for estimating Vgs(off) has been posted here:

https://www.viva-analog.com/forum/forum_files/jFETQuadraticModeling-DataJCM2015.pdf

in case we're not clear on this, the effective control range for a jFET operating as VCR
is 0volt to Vgs(off) ... (see AN105 below)

anybody interested in understanding phasor designs, or proper testing of jFET's for that matter,
needs to read this paper several times over (AN105):

http://www.vishay.com/docs/70598/70598.pdf

quiz time ...
so, let's say we found a quartet of j201's that exhibited Vgs(off) equal to -1v

the first purpose of the phasor is to modulate CV within that device operating range //
ie., to accommodate the device specs ... and not vice versa (why the BIAS control is adjustable)

a half-way approach (full range) would set the bias half way between Vgs(off) and 0 ... that is -0.5v
and then we would want our LFO to cause jFET gates to move in unison around that middle value

that's assuming we wanted the whole range of resistance variation, yielding max phasing later, etc ...

otherwise, we might want to shift closer to the Vgs(off) side to get
more swing in the high resistance range, etc ...

in that scenario, the bias control mounted externally can be referred to as a "color" control ...

http://www.lynx.bc.ca/~jc/phase45modded.gif

picking which edge to operate near ...
somewhat useful

the point being ... once we know what Vgs(off) values we have to accommodate
then we make necessary adjustments to the LFO and Bias trim so that
things work optimally (= deep phasing) ... and with room for tweaking either way

and, not just merely landing inside the range and hoping that our LFO waveform
provides the right span ...

...

now, if the Ron values vary a bit but the Vgs(off) values are pretty much bang on
then we're in good shape ...

using four equal value phasor caps (or not) will result in variations of their own
and unless one is fanatical about having everything work according to a numerical recipe (eg., Univibe relations)
the variation in Ron values will get lumped or absorbed into the existing capacitance value variations

with the open minded idea that variations is what makes analogue audio what it is ...
sometimes with happy accidents

but failing to be accurate, or even downright ignorant, of the Vgs(off) values of our devices
will mean that some devices may well not be operating in concert with the others, if at all ...

even if the calculated Ron values match bang on ...
the former value forces a stronger operating constraint on the whole system
than the relative resistance range of the devices

notice, the myriad of bogus faux-matching methods out there all have one thing in common :
they avoid talking about how to estimate Vgs(off)

which is, one last time, what we need to know when building a top sounding phasor

they generally tend to skirt the issue, prob because it cannot be measured (directly)
or, they have no idea how to deal with that

other than maybe measuring at Vgs at a very low current, say like 10uA - and calling that Vgs(off)
yes, there is at least some kind of effort in that cheat ... but not much really

in fact, we can do much better with a little effort

---

similar to what I did in my '98 Triode modeling article
I use interpolation to yield a way more accurate estimate for a device's Vgs(off) value ...

Idss can be extracted directly, obviously ... that one's a no brainer

if the testing is all done at the same test voltage (7.50v in my case)
then a simple jig using a pair of 9volt batteries, a couple of pots and a pair of meters can be arranged
for yielidng the signature pairs (Vgs(off) thru extrapolation) ... results tabulated, etc ...

I did this for three lots of 2n5457's ... but you could do the same with J201's
or any jFET for which Vgs(off) would be less than 9 volts in magnitude ...

easy ... nothing funny with any of our common low voltage jFET's

http://viva-analog.com/characterizing-and-matching-2n5457-jfet-transistors/

notice from my graph and table that very few devices actually match directly (within the given resolution)

the best I can do in my case is choose devices that have Vgs(off) values differ by at most 20mV
when pairing devices that are in adjacent voltage slots

seeing that my meters have 10mV resolution ...

so, being an estimate ... one would have to provide an indication
of the degree of error ...

none of the other so-called "testing" approaches make mention of any of this "resolution" business

---

now, in case anybody's wondering ...

the Keen method was obviously applied (likely taken from a bipolar device test method)
without doing too much thinking ... doesn't matter either way

all it does is apply NFB via an opamp to match currents flowing thru two jFET's ...

so, biaising the device in its active region "somewhere"

and so providing "a single"operating point inside the curves, so to speak ...
and measuring a voltage ... that has no known relation to either Vgs(off) or Idss
let alone both Vgs(off) and Idss

it is easy to show that two devices with proportionately opposite Idss and Vgs(off) values
could test identical in the so-called Keen platform ...

(I'll leave that to someone else to do that if they're interested)

ie., a locus of points could be shown to exist for any Keen test voltage

in theory, an infinite number of device with differing Idss and Vgs(off) voltages could produce the same
"reading" in the Keen sense ... lumping devices that are not in the true sense "matched"

this approach would take us no closer to figuring out how to design and execute a balanced phasor
other than, really, relying on luck ... and playing "pretend" at the same time

any "system" that extracts a single value, whether voltage or current, to characterize a jFET
device is automatically bogus because Vgs(off) and Idss may have a global trend that exhibits some proportionality
but locally are randomly distributed from each other ... I think my graph makes this clear

these two aspects are easy to confuse when reading datasheets ...
I can understand how one would make that mistake
still, ...

at the end of the day - two jFET devices can very well have identical Idss values (measured from the same reference voltage) yet exhibit differing Vgs(off) values ... and vice-versa, two jFET devices with identical Vgs(off) values could have differing Idss values measured the same way ... 2-D independence

---

for those who find all this stuff too troubling,
maybe taking all the fun out of building phasors, etc ...
I'll repeat a trick that I once discovered, and mentioned way back in the 90's on my P45 page ...

you can use the phasor circuit you've built to pseudo-match (by ear) the devices you have on hand

simply pop a device in only one stage (regardless if it's a 2,4, or more stages)
and play with the bias control while passing signal thru the circuit

starting from the same end every time, notice at which point the phasing kicks in when sweeping the bias control
do this for all your devices and try to find ones that seem to kick in at the same spot

that would be a sort of crude way of matching Vgs(off), tho nothing about Idss ... but that's ok
I've used it in the past and it's pretty much as good as going thru the hassle of measuring Idss and estimating Vgs(off)

in this case one would say that they're only matched for CV control range
and not altogether "perfectly" matched ...
but it would still produce a most intense phasing effect on account of the uniformity to bias

---

if peeps started measuring/estimating these Vgs(off)/Idss pairs for their devices
and posted their finding ... well, maybe folks could start trading/buying devices from each other
in order to get their matched pairs, quads and sextets ... and not have to go thru large numbers of devices
to get them ...

and, be done once and for all with all this random guesswork

just an idea ...

R.G.

Still grinding the axe, J.C.?
R.G.

In response to the questions in the forum - PCB Layout for Musical Effects is available from The Book Patch. Search "PCB Layout" and it ought to appear.

Eb7+9

call it what you like R.G. ... all part of advancing the art IMO

when I openly critiqued Koren's early triode models he wasn't happy at first, but he later corrected his mistakes and came up with a much more accurate approach ... you're invited to do the same

R.G.

Quote from: Eb7+9 on October 14, 2016, 10:32:25 AM
call it what you like R.G. ... all part of advancing the art IMO

when I openly critiqued Koren's early triode models he wasn't happy at first, but he later corrected his mistakes and came up with a much more accurate approach ... you're invited to do the same
Well good. Still pedantic and snotty. I'll call it what it is - pedantry.

I could go through the mess and point out the caveats. But for the use of the people who would rather make pedals than dig into semiconductor physics and the math world, I'll stand by my points.

The J201, while still a JFET, is an odd one compared to any other production JFETs. It's got odd specs even in the group of JFETs, which are themselves odd in the normal semiconductor world.

And while I understand that it must be maddening to see the world get along perfectly well with "bogus faux matching", the fact is that the quick and dirty techniques do in fact produce very usable results quickly and with little effort. In particular, you seem upset at the "Keen method", which I've never called it. In fact, I believe I've been clear that it was lifted from a book on using opamps to test semiconductors. At least someone in the real high production semiconductor world thinks it's good enough to not only use but publish to others in the industry as a reference technique. Perhaps you should take the issue up with them.

I also believe I've been clear about the matcher not looking for a perfectly accurate VGSoff. It is adapted to phaser use, matching to a 10K value. I've also been pretty clear about the shortcomings of any single-point matching technique for any "matched" parts. Single point matches are crude, and the more points the better. The more orthogonal dimensions of matching the better. However, the actual original technique was set up to test VGSoff for a current in the nano-amperes. Not exactly zero, but pretty close to it, and good enough for most real people.

Pretty much every time this comes up, you pop in with a rant about it not being exactly right, and look for points about why it's not "RIGHT". Every since I called you out for publishing my artwork without attribution or permission in your "Rainbow of Sounds" book, you've been griped off.

Perfection is nice, and resolution, accuracy, and precision in the pursuit of understanding are all valid. But continuing to yell "BUT IT'S NOT ABSOLUTELY ACCURATE!!" when people want something that works, not a certificate of perfection, is a little over the top. There are people who have a need to expend huge amounts of time and effort to ensure that they're accurate to seven decimal places. I wish them well, but don't envy them. That turn of mind can become a curse.

Here's some advice, J.C.. Publish a better, more accurate method. If it's enough better and more useful to real people, and easier to construct and work with, the quick and dirty matcher I came up with [back when there was nothing similar for pedal makers :icon_eek:]  will be forgotten. And you'll be vindicated without ranting on with oblique name calling. And very, very much more useful to the readers than snide lecture about perfection, no usable way to do better.

Of course, if the better, more accurate, more precise, more resolute (!?  :icon_lol: ) method doesn't do all that well, it will be passed over instead. Occam had a point.

But give it a rest. You've been on this for - what, fifteen years now? I get tired of typing a new version of this every few years.

R.G.

In response to the questions in the forum - PCB Layout for Musical Effects is available from The Book Patch. Search "PCB Layout" and it ought to appear.

Rob Strand

#10
I don't want to get too far into the argument so I'm keeping this short.

Having spend a lot of time on this issue myself I do believe the test current in RG's circuit is too high, like 450uA.   So I agree with Eb7+9 that you probably shouldn't call the measured value Vgoff.

However, that's a technical point.  The real issue is whether the higher test current has any impact on matching the JFETS for a phaser.  I believe it does.

Testing at a low current like 10uA provides a significant improvement in matching in a real phaser.
The actual test circuit isn't that important, the test current is; for example RG matcher circuit can be modified to reduce the test current by changing the 10k source resistor from 10k to 470k.


Back in 2003 (the post was on this forum) I wrote a program simulated the sorting process.   The idea was to see if the test current has an effect on passing "bad" JFETS.   It worked like this:
- Created 32000 randomly generated JFETS.  The JFETs weren't totally random.  They were created with a distribution of parameters which mimicked a batch of production JFETS.
- From these JFETS select the ones which conform to a specified range of rds_on values.   This set of JFETS represents those which have been perfectly sorted based on rds_on.
[Edit:  Actually the requirement was more elaborate than this.  The allowed JFETS had to match the resistance of a nominal JFET over the whole range of Vgs within +/-x%; sorry it was a long time ago.]
- Find the allowed range of measured voltages for the test circuit which correspond to the acceptable rds_on values.
- Apply the allowed test circuit voltages to the JFETS which *did not* pass the ideal rds_on selection.
  Ideally the test circuit should not pass any of these "out of spec" parts.

Results:
- Of the 32000 JFETs,  2806 passed the rds_on spec., leaving 29194 which fail.
- Testing at 10uA we find the test circuit passes 562 out of 29194 (1.9%) JFETs when it should not have.
- Testing at 450uA (ie. RG's unmodified circuit) we find the test circuit passes  3051 out of 29194 (10.4%) JFETs when it should not have.

So when we test at high currents the circuit will give five times more false positives than testing at the lower current.

Additions:
- Forgot to add the simulation actually included a parallel 22k resistor which is part of the phaser circuit.

Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

R.G.

Yeah, Rob. I remember.

The JFET matcher is by no means perfect, hence the "quick and dirty" label. But since 2002, a lot of JFETs have been quickly and dirtily matched to make a lot of phasers.  There's no question that grinding on the issue more finely or refining the test conditions, etc., will produce a better result.

Whether that's needed or not is a good issue for a redesign, as I've invited J.C. to do. The first "Greatly Improved JFET Matcher" I remember is from 2005, three years after I posted the thing.

When J.C. pops back in from time to time with his rant, I keep being tempted to redesign it. But I think the marginal gains would be small.

If I did a redesign, I'd probably go for doing a *much* better matcher. I'd set up a uC controlled test jig, have it sweep conditions while measuring Rds at various Vgs conditions and storing the points for curve fitting. That is really what a phaser matcher would do well - really produce the curve of Rds and Vgs over the useful range of Rds.

Sadly, I suspect that the curse of selection and matching would rear its ugly head again. Out of hundreds of JFETs, many would be close-ish, but none truly matched. So the flood of related data would give not only more data to pick from, but more reasons NOT to have any that were matched, and numbers to say how un-matched they were.

That direction lies grouping similar but not identical JFETs into bins so you can get some usable pairs, quads, hextets, and octets out of your few hundred JFETs. And once you're back to binning, you're back to the precise, detailed data not really winnowing out much more than the quick and dirty test.

The JFET matcher is far from perfect. But it's a handy tool for quick and good-enough results. Sometimes you need a hatchet, sometimes a scalpel, but in many cases you can get along with a pocketknife.
R.G.

In response to the questions in the forum - PCB Layout for Musical Effects is available from The Book Patch. Search "PCB Layout" and it ought to appear.

Rob Strand

QuoteI sweep conditions while measuring Rds at various Vgs conditions and storing the points for curve fitting. That is really what a phaser matcher would do well

After much playing around with this stuff I realized the cause of the mismatch is invariably at the end near the cut-off voltage of the JFET.   The sensitivity of the JFET resistance to the sweep voltage is *very* high there.   I concluded there's no point at all matching the whole curve.  If you match at low currents the rest of the curve lines-up by nature ie. is no worse than the match near cut-off.

QuoteThat direction lies grouping similar but not identical JFETs into bins so you can get some usable pairs, quads, hextets, and octets out of your few hundred JFETs. And once you're back to binning, you're back to the precise, detailed data not really winnowing out much more than the quick and dirty test.

There's a lot of truth in that.   Someone at home who has finite resources is unlikely to buy more than say 50 JFETs.   If those were "ordered" using *any* half-decent circuit (like your circuit or some of the others around) I have a feeling the differences in the ordering would be minimal.   Certainly not enough to make a significant difference to the JFETs you selected.  You basically have to make do with what you have.   If you but 10 units to select the 6 bets ones then you options are getting thin on the ground.   (In production I would feel the urge to test at low currents but that's about as far as I would go.)

Using monolithic JFET packs is likely to give the most benefit as the devices tend to line-up by nature.   I guess that is part the success of the Ross phasers.   These days you can get device pairs.

As a side note, one thing I learnt from someone in the semiconductor industry is the manufacturers processes are *much* tighter that the datasheets.   The wide specs in the datasheet are often present so they have the flexibility to change the process.   When a new process is used the spread within that process has different mean to the old process but devices made by the same process are tightly bunched.   Devices within a batch would be expected to be better matched.

Anyway, I put enough time into this issue over the past 20 years or so to not lose anymore sleep over it.   I don't think anyone else should either!

Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

Rob Strand

"Modern" Monolithic JFETS.

The matching between the two JFETS is 10mV to 25mV.  If you bought two of these (ie. 4 devices total) I don't know what the matching would be like in practice.

General:
https://duckduckgo.com/?q=monolithic+jfets&ia=web

Article:
http://www.edn.com/electronics-products/electronic-product-reviews/other/4442559/Monolithic-JFETs-are-alive-and-well

Data Sheets:
http://www.linearsystems.com/assets/media/file/datasheets/LSK489.pdf
http://www.farnell.com/datasheets/910100.pdf
Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

Eb7+9

#14
Quote from: Rob Strand on October 14, 2016, 09:24:07 PM
Having spend a lot of time on this issue myself I do believe the test current in RG's circuit is too high, like 450uA.   So I agree with Eb7+9 that you probably shouldn't call the measured value Vgoff.

Results:
- Of the 32000 JFETs,  2806 passed the rds_on spec., leaving 29194 which fail.
- Testing at 10uA we find the test circuit passes 562 out of 29194 (1.9%) JFETs when it should not have.
- Testing at 450uA (ie. RG's unmodified circuit) we find the test circuit passes  3051 out of 29194 (10.4%) JFETs when it should not have.


finally, some real and telling numbers ...
let us take the time to soberly digest the implication of these results

Quote from: R.G. on October 11, 2016, 01:18:44 PM
Understanding JFETs even to this crude level took me quite a while. There's a lot more that I'm sure I don't know yet.

indeed, you would need to understand a lot more about jFET's to see my point
or even fathom a proper matching approach for that matter

my advice Keen, if you're going to come up with an "unheard-of" matching method for jFET devices
you had better know how they work, fully and completely ...
and then properly explain how the technique works to any critic that might call you on it
that's how science works

and by that I mean beyond using mere vagaries and hand waving ...
this is done using the language of mathematics, something that's pretty much absent in your work

it's pretty obvious,

as I said, that you can't have any clue how your "tester" circuit does what you think it's supposed to do
because, again, it makes NO sense
as your circuit lumps the interaction of two independent variables into a single operating point test ...
(this is where the disconnect in your thinking lies)

yes, I've said it enough times now // and this will be one of the last :)

every time your "jFET tester" gets put to the test we get the same panicked hand-waving ...
I understand you have little choice but to offer vagaries at this point
'cuz if you could do the math it would be telling you something that's different than what you're hoping for ...

thanks Rob ... I rest my case

Cozybuilder

Really, is this harshness necessary? RG has been a valuable contributor to the field for many years.

Do you have a better method for matching JFETs that you can share? I for one would welcome this information.
Some people drink from the fountain of knowledge, others just gargle.

rutabaga bob

As a guy who toys with the idea of making a phaser every now and then, I am eagerly awaiting the layout and build docs for the laboratory-quality jfet matcher our friend is going to unveil in the next exciting episode!  Yowza!    :icon_smile:
Life is just a series of obstacles preventing you from taking a nap...

"I can't resist a filter" - Kipper

feddozz

Hello guys,

just bumped into this thread.

I was just wondering when the release of the new, super accurate and free jFET matcher is planned for.

Thanks
And "dog balls on your face"...

Rob Strand

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According to the water analogy of electricity, transistor leakage is caused by holes.

GibsonGM

Quote from: Cozybuilder on December 13, 2016, 09:16:54 AM
Really, is this harshness necessary? RG has been a valuable contributor to the field for many years.

Do you have a better method for matching JFETs that you can share? I for one would welcome this information.

Wow, that was like watching Zeus battle Poseidon. 

I know a FAIR bit of mathematics...if it requires me to work with differentials to fully understand FETs for my hobby, no thanks....some things work pretty well "quick & dirty"   :)
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