Common collector ( buffer) and measures to increase stability?

Started by Max999, January 13, 2018, 06:39:35 PM

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Max999

@Antonis. I have Spiced the schematic you showed. It is an interesting circuit. What I see ( correct me if I am wrong), are two emitter followers that are bootstrapping themselves. The second bjt is also delivering a signal to the resistor before the first bjt, so bjt1 gets an ever lower input impedance then it would if it would just be bootstrapping itself. The hfe of the two resistors are multiplied so this permits the use of very low resistance voltage dividers for the bias. What the 82r resistors are doing is not clear to me.

@PRR I have Googled the Sallen-Key, but it will take more time for me to get a vague understanding of this. I never thought I could learn so much starting with wanting a simple bjt buffer.

@everybody
I have made a new schematic for my volume pedal. It is a bootstrapped Darlington. Unfortunately the forum gives me an error at the moment when trying to upload the schematic, I will try again later.

Does anybody have recommendations or do's and don'ts when using a Darlington?

PRR

> forum gives me an error at the moment when trying to upload

Technically: PostImg.org had a problem. It seems to have burped itself.

I happened across a related circuit in an old rag:



I'm not going to endorse the Editor's Note. It seems slippery to me. He may be mixing cause and effect. (This is very early in the transistor era, at least for everyday audio uses.) My Idiot Assistant, for hFE/alpha of 150, gives 111K no bootstrap, 714K bootstrapped (not >1Meg as written). And yes there is a subsonic bump, and it depends a lot on the source impedance.
  • SUPPORTER

PRR

  • SUPPORTER

Max999

PRR, the schematic you posted is almost identical in layout to mine. I have not checked the input impedance of your posted circuit. What I have come up with is this:



It sims very nicely with a very even frequency response, without bumps and Sallen-key-like effects, and an even input impedance, although the input impedance starts to fall off above 10KhZ. But this only gives me minus 1% voltage delivered above 10KhZ.
I will have to do more simulations to see how this is affected by the source impedance, as I did not knew this is also a factor that changes things. Thank you for this information.

Is the schematic a good start to keep working on or are there blatant mistakes in it that need improvement? Are there other things that could be added to make it behave more politely ( if needed)?

antonis

Quote from: Max999 on January 21, 2018, 05:41:49 PM

Is the schematic a good start to keep working on or are there blatant mistakes in it that need improvement? Are there other things that could be added to make it behave more politely ( if needed)?
Not a bad one but let us see the way you've decided component specific values...  :icon_wink:

You've biased Q1 base at 9V resulting to 7.5V on Emitter (2 X VBE for Darlington arrangement..) hence 1mA quiescent current..
(so far so good..) :icon_wink:
Emitter intrinsic resistance for 1 mA is considered 25 Ohms, so Emitter follower gain A is RE/(RE + re) -> 7500/7525 = 0.9966
Bootstrapped resistor value (from signal point of view) is R2/(1-A) -> 100k/0.0034 = 30ΜΩ, in parallel with base resistance of about 75-100M (hFE x RE)(*) also in parallel with 10M anti-pop resistor R5...
(*) RE actually is about 5k due to R1 set in parallel with R3//R4 but its exact value is meaningless due to Q1 gain wide spread..
So, bootstrapped value in mainly dominated by R5 value (which, IMHO, should be of lower value for 1μF cap - further dominating total imput impedance..)
From DC point of view (bias), R2 is set in series with R3/R4 equivalent resistance (16k5 + 100k) severely dominating voltage divider "stiffnes" (raising its equivalent resistance) - although a Darlington wouldn't mind a lot due to its very high DC gain..

Conclusion: You may proceed as it is or lower R2 to 33k(say) leaving R5 at 10M (on your own pop-risk..) :icon_wink:


"I'm getting older while being taught all the time" Solon the Athenian..
"I don't mind  being taught all the time but I do mind a lot getting old" Antonis the Thessalonian..

Max999

@antonis

Thank you for your helpfull response.

I will be building the volume pedal without a footswitch, does this mean I can omit R5? I was thinking that the bjt would need a resistor there, just like an opamp, so the input was not floating with nothing plugged in.

I would be happy to leave it out if I could.

antonis

If volume pedal is always engaged, you don't need R5..
(volume pedal's output resistance should serve as an anti pop/floating resistor for C3 - you even may not need C3 itself if volume pedal's output is already DC decoupled..)
(I definately need some coffee or your Volume pot will crackle a lot..) :icon_redface:
"I'm getting older while being taught all the time" Solon the Athenian..
"I don't mind  being taught all the time but I do mind a lot getting old" Antonis the Thessalonian..

Gus

Use the search at this site and type in "bootstrap" you should find a number of posts and threads

antonis

I second Gus proposal 'cause we deviated a bit from Max999 original query.. :icon_redface:

Quote from: Max999 on January 13, 2018, 06:39:35 PM
I am trying to make a very simple single transistor bjt buffer circuit.
"I'm getting older while being taught all the time" Solon the Athenian..
"I don't mind  being taught all the time but I do mind a lot getting old" Antonis the Thessalonian..

Max999

Gentlemen I want to thank you all for taking the time to help and educate me on my journey to a bjt buffer design. You have saved me years of searching and troubleshooting.

I declare the design done and will proceed to build it.

Rob Strand

QuoteAnother option is to put in "base stopper", a series resistor connected at the base. Proposed value is between several hundred Ohms and 2K7. What would be a good value?
This comes from Doug Self's book.

There's this example out of Jim William's book:
https://www.youtube.com/watch?v=dhT0xeiCYVQ

I'm not 100% sure the oscillation is caused by the buffer in this case since the input has minimal inductance.  The explanation in the video doesn't convince me.  Moreover I've fixed oscillation in similar circuits by modifying the feedback loop.

I am aware of CC amplifiers doing some weird stuff at high frequencies.  You see this in pulse generators with fast edges.

It is possible for these things to oscillate when there is lead inductance in the base.
See below.  I added an inductance to the base and varied the capacitive load.
Then I varied the input and output series resistor to see what is effective at removing the oscillations.

The lead inductance is 1uH however I was able to get oscillation with 100nH at > 100MHz.
Adding Rc and a cap isn't going to help this set-up.  Rc alone is quite ineffective and
only helps the very high frequency oscillation cases.

Clearly the 1k input resistor is the most effective at removing the oscillation.

Some of the other cases demonstrate how marginal things are.  A 1pF load is not practical.   A real circuit will have parasitic capacitances all over the place and the situation is far more complex.  At  100MHz the the circuit layout has a large effect.

The current source I1 is used to "kick" the circuit.  This is necessary for a simulation.
Normally the kick comes from power-up or external noise.

Schematic:



1) No input or output resistor it oscillates with any load.   As CL increases it become less strong.



2) A 300 ohm input resistor is marginal when CL is small.



3) A 1k input resistor removes the oscillation.



4) Adding a 1k output resistor helps except when CL is small.



5) It takes 2k2 on the output to get rid of of the oscillation for small CL.



[Edit: Here's virtually a whole chapter on the topic:
https://books.google.com.au/books?id=T28-AwAAQBAJ&pg=PA290#v=onepage&q&f=false

and

https://books.google.com.au/books?id=xYKGAAAAQBAJ&pg=PA221&lpg=PA221&dq=emitter+follower+oscillation&source=bl&ots=jgaT_2BK3J&sig=jGWfwVPE_w8FdcVXTxOcPMT9nYk&hl=en&sa=X&redir_esc=y#v=onepage&q&f=false

Small- Signal Audio Design by Douglas Self
https://tandfbis.s3.amazonaws.com/fp-usermedia/uploadedFiles/Small.Signal.Audio.Design.Ch3.pdf

Some early Papers

HP Journal (Last two pages)
http://www.hpl.hp.com/hpjournal/pdfs/IssuePDFs/1966-04.pdf

http://www.eevblog.com/forum/beginners/noise-on-emitter-follower/?action=dlattach;attach=348962;PHPSESSID=a0jfp7ln9i0hnbd0uujjpeglum
]
Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.

Rob Strand

Images restored for reply #30


Schematic:

https://postimg.cc/QVRfL4gm



1) No input or output resistor it oscillates with any load.   As CL increases it become less strong.

https://postimg.cc/rD9jrqBZ


2) A 300 ohm input resistor is marginal when CL is small.

https://postimg.cc/r0R5QTHk


3) A 1k input resistor removes the oscillation.

https://postimg.cc/rKNxhQfK


4) Adding a 1k output resistor helps except when CL is small.

https://postimg.cc/4Y4tjV0w


5) It takes 2k2 on the output to get rid of of the oscillation for small CL.

https://postimg.cc/q6Xh5vX9

Send:     . .- .-. - .... / - --- / --. --- .-. -
According to the water analogy of electricity, transistor leakage is caused by holes.