jFET Characterization Technique Using Only 9volt Battery and DMM

[Eb7+9]

well, it's good to see proper jFET test numbers finally being presented in this forum ...
from some of the ensuing reactions it's obvious that it can be easy for anyone to quickly start drowning in math if not careful ...

there's no need ...

with regard to device testing, there is a much simpler approach that can be taken for the testing part
simpler than the interpolation method I posted for the 2n5457 devices

and just about as accurate ...
specifically, this approach leaves the heavy part of the math out of the characterizing process

to make things easier to understand I wrote an explanation that accompanies
the simplest test approach that we know of ... (just slightly less accurate than my interpolation technique)

It's an approach that is simple yet accurate

the Idss test is obvious, the Vgs(off) test I found somewhere else and isn't my idea

both I feel need to be considered - perhaps they can become the basis for a std technique
a technique that everybody can use to get good numbers with minimum effort

https://viva-analog.com/jfet-characterization-technique-using-only-9v-battery-and-dmm/

...

btw, in the process of revisiting this problem, today I stumbled on a way to convert the Univibe circuit
from opto to floating jFET VCR's using current-control ... a fun design exercise

something I'd never seen before, and didn't know was possible
a pleasant discovery

jFET VIBE - not a huge deal in itself as it will suffer from the same 100mV headroom thing as any other jFET based phasor

but interestingly, the approach I drew up allows for scaling of Cv's at each gate, and therefore
also allows for un-matched jFET's to be used and perform the same as a set of matched devices would

something that was analogously demonstrated in my op-amp based "Paradigm Shifter"

...

you just never know what you're gonna find when re-visiting old work

[GibsonGM]

Really cool...thank you for that 

[rankot]

You mentioned in your article that the Beta factor is used to indirectly infer the Idss current. Do you know how? What is the equation for Beta? I'm asking that because I want to make a JFET model with variable Idss/Vgs.

[Eb7+9]

oops, typo ... I mean Lambda factor

---

I edited my post to include this good reference on the subject

www.wseas.us/e-library/conferences/2007creteee/papers/563-159.pdf


the Lambda factor is used to describe the slope of the Vds transfer curves in the pinch-off or "linear" region

to provide a picture I did a quick search and found this from U Michigan:

https://www.scribd.com/document/358180093/0060A-JFET-Prob-Answs

FYI, it is similar in purpose to the Early voltage that defines the slope for BJT transistors in their linear region of operation

(see James Early's ref here: https://en.wikipedia.org/wiki/Early_effect)

---

the Lambda factor is used as follows in the Id function ... Id = (1 + Lambda x Vds)
and determines the output conductance

the inverse of this conductance is, of course, the output resistance term "ro" that we all use in the usual
transistor Pi model (... ie., in parallel with the output transconductance source)

---

what I meant about my statement is that starting with a data point away (above) from -Vgs(off)
and knowing Lambda we can work back to the Idss value quite simply by using the slope of the line that connects the two

a trivial observation ...

.ps on a side note, last year I found a (surprisingly) recent Iranian research paper that finally gave the closed form equations for a jFET differential pair ... something that was always missing from the textbooks ... for the life of me I can't find it // if anybody does come across it please pm-me the link

[R.G.]

Hi, J.C.   

Keep on trying!

[merlinb]

Might aswell leave this here again:

[EBK]

Might aswell leave this here again:

But, how did you do that using so few words? 

[Gus]

Have you seen this?
https://www.forsselltech.com/media/attachments/JFET_Jig1.pdf

[GibsonGM]

I made a jig to test FETs (I think there's one on Runoffgroove that is basically the same, on the Fetzer page).    Using the above method (and merlin's), I came up with DURN near the same results the more complicated fixture gave me.   This way was much faster, zero parts etc.

[Rob Strand]

I made a jig to test FETs (I think there's one on Runoffgroove that is basically the same, on the Fetzer page).    Using the above method (and merlin's), I came up with DURN near the same results the more complicated fixture gave me.   This way was much faster, zero parts etc.

Eb7+9's method looks as good as any of the "good" methods.  The test current is inherently low so it *has to* produce good/sensible results.

For DIYer's I'd have a slight urge to put a resistor in series with the supply to prevent frying the JFET.  For example you could connect it wrong and the Gate diode would be shorted across the supply, or, if the gate becomes unconnected it would pull a lot of current.    Maybe 100 ohms to 220 ohms would do it.  You don't want to go too high as high Idss devices would have off readings.   I suppose you have to know the Idss and Vp range that you can trust - not that any of the other matchers have bothered about that!

[temol]

I made a jig to test FETs (I think there's one on Runoffgroove that is basically the same, on the Fetzer page).    Using the above method (and merlin's), I came up with DURN near the same results the more complicated fixture gave me. 

What readings difference is acceptable (for you for example)?
I've just breadboarded those two "circuits" - one from a Runoffgroove website, and "no parts, DMM only" and checked one J201. ROG - 0.87V, DMM only - 0.92V.

T.

[GibsonGM]

I'm not an authority on 'how close is close enough, Temol'.  But the results I got using this method were more like a few 10's of a volt difference down to a few HUNDREDTHS...less than .2V or .3V on average, I would say, from the 'no parts' to 'some parts' method.  Of course, you WILL reach a point where Vp matters, and would reject the FET if too far out of range, so you do need to have at least SOME accuracy here.     

But it seems that for most circuits, what you are looking for mostly is *matched* sets of JFETs, and being off by .3V would not make a horrible difference to the outcome - the consistency between parts is what you are after.    So if EACH JFET read .3V lower Vp, for example, it would not matter as long as this difference was consistent between methods.

This evening I may take a few FETs and find IDss and Vp using the 'no parts method', then use those values on the calculator at ROG and make a Fetzer valve...and then see what the wave looks like on my scope using the recommended values of Rd, Rs...I predict we'll find a very similar outcome to that with the 'some parts' method.

[temol]

I've just took the same J201 and measured Vp and Idss using both "devices". Let's say - ROG - A, DMM - B.

A - Vp 0.864V, Idss 0.721mA
B - Vp 0.925V, Idss 0.55mA

Using ROG calculator I have the following
A - Rs 995, Rd 9077, Vs 0.33V, Vd 6V
B - Rs 1396, Rd 11700, Vs 0.35V, Vd 6.05V

off to the breadboard to build Fetzer valve... done

Measurements taken from the breadboard
A - Vs 0.3V, Vd 6.11V
B - Vs 0.35V, Vd 6V

T.

[GibsonGM]

Yes, that's what I was talking about...VERY small differences!    Let us know how it sounds.

[GibsonGM]

Yup, worked great. I ended up with the Av predicted from the ROG calculator...wave shape was same as the input.  So it works!  (we already knew that, tho)

[temol]

GibsonGM - I did not test it with the guitar, I only checked the accuracy of measurements with the use of ROG tester and DMM and then with a real circuit.

T.

[GibsonGM]

GibsonGM - I did not test it with the guitar, I only checked the accuracy of measurements with the use of ROG tester and DMM and then with a real circuit.

T.

Well, it behaves as expected.  It reproduced an approx. 1V input (sine) without any noticeable distortion, to the gain predicted (1.5....not very much, but that was the characteristic of my 2N5457).   It sounded like a Fetzer with guitar    Little boost.   

If I were to put 4 of them in series, then we'd have something fun!